head 1.4; access; symbols pkgsrc-2022Q1:1.3.0.84 pkgsrc-2022Q1-base:1.3 pkgsrc-2021Q4:1.3.0.82 pkgsrc-2021Q4-base:1.3 pkgsrc-2021Q3:1.3.0.80 pkgsrc-2021Q3-base:1.3 pkgsrc-2021Q2:1.3.0.78 pkgsrc-2021Q2-base:1.3 pkgsrc-2021Q1:1.3.0.76 pkgsrc-2021Q1-base:1.3 pkgsrc-2020Q4:1.3.0.74 pkgsrc-2020Q4-base:1.3 pkgsrc-2020Q3:1.3.0.72 pkgsrc-2020Q3-base:1.3 pkgsrc-2020Q2:1.3.0.68 pkgsrc-2020Q2-base:1.3 pkgsrc-2020Q1:1.3.0.48 pkgsrc-2020Q1-base:1.3 pkgsrc-2019Q4:1.3.0.70 pkgsrc-2019Q4-base:1.3 pkgsrc-2019Q3:1.3.0.66 pkgsrc-2019Q3-base:1.3 pkgsrc-2019Q2:1.3.0.64 pkgsrc-2019Q2-base:1.3 pkgsrc-2019Q1:1.3.0.62 pkgsrc-2019Q1-base:1.3 pkgsrc-2018Q4:1.3.0.60 pkgsrc-2018Q4-base:1.3 pkgsrc-2018Q3:1.3.0.58 pkgsrc-2018Q3-base:1.3 pkgsrc-2018Q2:1.3.0.56 pkgsrc-2018Q2-base:1.3 pkgsrc-2018Q1:1.3.0.54 pkgsrc-2018Q1-base:1.3 pkgsrc-2017Q4:1.3.0.52 pkgsrc-2017Q4-base:1.3 pkgsrc-2017Q3:1.3.0.50 pkgsrc-2017Q3-base:1.3 pkgsrc-2017Q2:1.3.0.46 pkgsrc-2017Q2-base:1.3 pkgsrc-2017Q1:1.3.0.44 pkgsrc-2017Q1-base:1.3 pkgsrc-2016Q4:1.3.0.42 pkgsrc-2016Q4-base:1.3 pkgsrc-2016Q3:1.3.0.40 pkgsrc-2016Q3-base:1.3 pkgsrc-2016Q2:1.3.0.38 pkgsrc-2016Q2-base:1.3 pkgsrc-2016Q1:1.3.0.36 pkgsrc-2016Q1-base:1.3 pkgsrc-2015Q4:1.3.0.34 pkgsrc-2015Q4-base:1.3 pkgsrc-2015Q3:1.3.0.32 pkgsrc-2015Q3-base:1.3 pkgsrc-2015Q2:1.3.0.30 pkgsrc-2015Q2-base:1.3 pkgsrc-2015Q1:1.3.0.28 pkgsrc-2015Q1-base:1.3 pkgsrc-2014Q4:1.3.0.26 pkgsrc-2014Q4-base:1.3 pkgsrc-2014Q3:1.3.0.24 pkgsrc-2014Q3-base:1.3 pkgsrc-2014Q2:1.3.0.22 pkgsrc-2014Q2-base:1.3 pkgsrc-2014Q1:1.3.0.20 pkgsrc-2014Q1-base:1.3 pkgsrc-2013Q4:1.3.0.18 pkgsrc-2013Q4-base:1.3 pkgsrc-2013Q3:1.3.0.16 pkgsrc-2013Q3-base:1.3 pkgsrc-2013Q2:1.3.0.14 pkgsrc-2013Q2-base:1.3 pkgsrc-2013Q1:1.3.0.12 pkgsrc-2013Q1-base:1.3 pkgsrc-2012Q4:1.3.0.10 pkgsrc-2012Q4-base:1.3 pkgsrc-2012Q3:1.3.0.8 pkgsrc-2012Q3-base:1.3 pkgsrc-2012Q2:1.3.0.6 pkgsrc-2012Q2-base:1.3 pkgsrc-2012Q1:1.3.0.4 pkgsrc-2012Q1-base:1.3 pkgsrc-2011Q4:1.3.0.2 pkgsrc-2011Q4-base:1.3 pkgsrc-2011Q3:1.2.0.70 pkgsrc-2011Q3-base:1.2 pkgsrc-2011Q2:1.2.0.68 pkgsrc-2011Q2-base:1.2 pkgsrc-2011Q1:1.2.0.66 pkgsrc-2011Q1-base:1.2 pkgsrc-2010Q4:1.2.0.64 pkgsrc-2010Q4-base:1.2 pkgsrc-2010Q3:1.2.0.62 pkgsrc-2010Q3-base:1.2 pkgsrc-2010Q2:1.2.0.60 pkgsrc-2010Q2-base:1.2 pkgsrc-2010Q1:1.2.0.58 pkgsrc-2010Q1-base:1.2 pkgsrc-2009Q4:1.2.0.56 pkgsrc-2009Q4-base:1.2 pkgsrc-2009Q3:1.2.0.54 pkgsrc-2009Q3-base:1.2 pkgsrc-2009Q2:1.2.0.52 pkgsrc-2009Q2-base:1.2 pkgsrc-2009Q1:1.2.0.50 pkgsrc-2009Q1-base:1.2 pkgsrc-2008Q4:1.2.0.48 pkgsrc-2008Q4-base:1.2 pkgsrc-2008Q3:1.2.0.46 pkgsrc-2008Q3-base:1.2 cube-native-xorg:1.2.0.44 cube-native-xorg-base:1.2 pkgsrc-2008Q2:1.2.0.42 pkgsrc-2008Q2-base:1.2 cwrapper:1.2.0.40 pkgsrc-2008Q1:1.2.0.38 pkgsrc-2008Q1-base:1.2 pkgsrc-2007Q4:1.2.0.36 pkgsrc-2007Q4-base:1.2 pkgsrc-2007Q3:1.2.0.34 pkgsrc-2007Q3-base:1.2 pkgsrc-2007Q2:1.2.0.32 pkgsrc-2007Q2-base:1.2 pkgsrc-2007Q1:1.2.0.30 pkgsrc-2007Q1-base:1.2 pkgsrc-2006Q4:1.2.0.28 pkgsrc-2006Q4-base:1.2 pkgsrc-2006Q3:1.2.0.26 pkgsrc-2006Q3-base:1.2 pkgsrc-2006Q2:1.2.0.24 pkgsrc-2006Q2-base:1.2 pkgsrc-2006Q1:1.2.0.22 pkgsrc-2006Q1-base:1.2 pkgsrc-2005Q4:1.2.0.20 pkgsrc-2005Q4-base:1.2 pkgsrc-2005Q3:1.2.0.18 pkgsrc-2005Q3-base:1.2 pkgsrc-2005Q2:1.2.0.16 pkgsrc-2005Q2-base:1.2 pkgsrc-2005Q1:1.2.0.14 pkgsrc-2005Q1-base:1.2 pkgsrc-2004Q4:1.2.0.12 pkgsrc-2004Q4-base:1.2 pkgsrc-2004Q3:1.2.0.10 pkgsrc-2004Q3-base:1.2 pkgsrc-2004Q2:1.2.0.8 pkgsrc-2004Q2-base:1.2 pkgsrc-2004Q1:1.2.0.6 pkgsrc-2004Q1-base:1.2 pkgsrc-2003Q4:1.2.0.4 pkgsrc-2003Q4-base:1.2 netbsd-1-6-1:1.2.0.2 netbsd-1-6-1-base:1.2 netbsd-1-6:1.1.0.8 netbsd-1-6-RELEASE-base:1.1 pkgviews:1.1.0.4 pkgviews-base:1.1 buildlink2:1.1.0.2 buildlink2-base:1.1 netbsd-1-5-PATCH003:1.1 netbsd-1-5-PATCH001:1.1; locks; strict; comment @# @; 1.4 date 2022.05.15.05.15.52; author wiz; state dead; branches; next 1.3; commitid KUUIDw2ejY3HV6ED; 1.3 date 2011.10.18.23.25.50; author minskim; state Exp; branches; next 1.2; 1.2 date 2002.08.27.03.00.13; author dmcmahill; state Exp; branches; next 1.1; 1.1 date 2001.02.15.07.18.57; author dmcmahill; state Exp; branches; next ; desc @@ 1.4 log @lgrind: remove Does not build, release from 1999, license issues, not maintained @ text @$NetBSD: patch-ad,v 1.3 2011/10/18 23:25:50 minskim Exp $ Add Verilog and Verilog-A --- lgrindef.orig Tue Aug 4 09:01:00 1998 +++ lgrindef Mon Aug 26 22:54:31 2002 @@@@ -685,4 +685,75 @@@@ tk_popup tkwait toplevel trace unknown unset update uplevel upvar while winfo wm: +# verilog. Written by Dan McMahill +Verilog:\ + :pb=\dmodule\d?\p:np=\)\d;:bb=begin\d:be=end\d:\ + :cb=/*:ce=*/:sb=":se=\e":\ + :tl:ab=//:ae=$:id=_$`:\ + :tb=%%:te=%%:mb=%\$:me=\$%:vb=%\|:ve=\|%:\ + :kw=always and assign attribute begin buf bufif0 bufif1 case casex \ + casez cmos deassign default defparam disable edge else end endattribute \ + endcase endfunction endmodule endprimitive endspecify \ + endtable endtask event for force forever fork function highz0 highz1 if initial \ + inout input integer join large macromodule medium module nand negedge nmos nor \ + not notif0 notif1 or output parameter pmos posedge primitive pull0 pull1 \ + pulldown pullup rcmos real realtime reg release repeat rnmos rpmos rtran \ + rtranif0 rtranif1 scalared signed small specify specparam strength strong0 \ + strong1 supply0 supply1 table task time tran tranif0 tranif1 tri tri0 tri1 \ + triand trior trireg unsigned vectored wait wand weak0 weak1 while wire wor \ + xnor xor\ + $bitstoreal $countdrivers $display $fclose $fdisplay $finish $fmonitor \ + $fopen $fstrobe $fwrite $getpattern $history $incsave $input $itor $key \ + $list $log $monitor $monitoroff $monitoron $nokey $time \ + `accelerate `autoexpand_vectornets `celldefine `default_nettype `define \ + `else `endcelldefine `endif `endprotect `endprotected `expand_vectornets \ + `ifdef `include `noaccelerate `noexpand_vectornets `noremove_gatenames \ + `nounconnected_drive `protect `protected `remove_gatenames `remove_netnames \ + `resetall `timescale `unconnected_drive: + +# VerilogA. Written by Dan McMahill +# +# the keywords were from appendix E of +# the Affirma Verilog-A Language Reference, Dec. 1999 +# +# the ` compiler directives were from page 11-2 of +# the Affirma Verilog-A Language Reference, Dec. 1999 +# +# the $ simulator functions were from chapter 9 +# the Affirma Verilog-A Language Reference, Dec. 1999 +VerilogA:\ + :pb=\dmodule\d?\p:np=\)\d;:bb=begin\d:be=end\d:\ + :cb=/*:ce=*/:sb=":se=\e":\ + :tl:ab=//:ae=$:id=_$`:\ + :tb=%%:te=%%:mb=%\$:me=\$%:vb=%\|:ve=\|%:\ + :kw=abs abstol access acos ac_stim always analog analysis and asin \ + asinh assign atan atan2 atanh begin bound_step branch buf bufif0 \ + bufif1 case casex \ + casez cmos cos cosh cross ddt ddt_nature deassign default defparam \ + disable discipline discontinuity edge else \ + end enddiscipline \ + endcase endfunction endmodule endnature endprimitive endspecify \ + endtable endtask event exclude exp final_step flicker_noise flow for \ + force forever fork from function generate ground highz0 highz1 hypot \ + idt idtmod idt_nature if ifnone inf initial initial_step\ + inout input integer join laplace_nd laplace_np laplace_zd laplace_zp \ + large last_crossing ln log macromodule max medium min module nand \ + nature negedge nmos noise_table nor \ + not notif0 notif1 or output parameter pmos posedge potential pow \ + primitive pull0 pull1 \ + pulldown pullup rcmos real realtime reg release repeat rnmos rpmos rtran \ + rtranif0 rtranif1 scalared sin sinh slew small specify specparam sqrt \ + strong0 \ + strong1 supply0 supply1 table taan tanh task temperature time timer \ + tran tranif0 tranif1 transition tri tri0 tri1 \ + triand trior trireg units vectored vt wait wand weak0 weak1 while \ + white_noise wire wor \ + xnor xor zi_nd zi_np zi_nd zi_zp \ + $realtime $temperature $vt $random $dist_uniform $dist_normal \ + $dist_exponential $dist_poisson $dist_chi_square $dist_t $dist_erlang \ + $limexp \ + $strobe $display $pwr $fopen $fstrobe $fdisplay $fclose \ + $finish $stop \ + `define `undef `ifdef `include `timescale `resetall `default_nodetype: + # JL - Added visbasic 6 Aug 1996. Note: this is not complete! @@@@ -748,4 +819,6 @@@@ :pro=prolog:\ :m=matlab:\ + :v=verilog:\ + :va=veriloga:\ :f=f77:F=f77:for=f77: @ 1.3 log @Let lgrind honor the TeX Live directory structure. @ text @d1 1 a1 1 $NetBSD: patch-ad,v 1.2 2002/08/27 03:00:13 dmcmahill Exp $ @ 1.2 log @add Verilog-A definitions @ text @d1 1 a1 1 $NetBSD$ d5 2 a6 2 --- ../lgrindef.orig Tue Aug 4 09:01:00 1998 +++ ../lgrindef Mon Aug 26 22:54:31 2002 @ 1.1 log @add verilog support. tried to contact the last known author/maintainer for lgrind to feed patch back to, but email bounced. @ text @d3 2 d6 2 a7 2 +++ ../lgrindef Wed Feb 14 22:34:26 2001 @@@@ -685,4 +685,30 @@@@ d10 1 a10 1 +# verilog. Written by Dan McMahill d15 1 a15 1 + :zb=@@:ze=@@:tb=%%:te=%%:mb=%\$:me=\$%:vb=%\|:ve=\|%:\ d36 45 d83 1 a83 1 @@@@ -748,4 +774,5 @@@@ d87 1 @