head 1.3; access; symbols pkgsrc-2023Q3:1.2.0.20 pkgsrc-2023Q3-base:1.2 pkgsrc-2023Q2:1.2.0.18 pkgsrc-2023Q2-base:1.2 pkgsrc-2023Q1:1.2.0.16 pkgsrc-2023Q1-base:1.2 pkgsrc-2022Q4:1.2.0.14 pkgsrc-2022Q4-base:1.2 pkgsrc-2022Q3:1.2.0.12 pkgsrc-2022Q3-base:1.2 pkgsrc-2022Q2:1.2.0.10 pkgsrc-2022Q2-base:1.2 pkgsrc-2022Q1:1.2.0.8 pkgsrc-2022Q1-base:1.2 pkgsrc-2021Q4:1.2.0.6 pkgsrc-2021Q4-base:1.2 pkgsrc-2021Q3:1.2.0.4 pkgsrc-2021Q3-base:1.2 pkgsrc-2021Q2:1.2.0.2 pkgsrc-2021Q2-base:1.2 pkgsrc-2021Q1:1.1.0.4 pkgsrc-2021Q1-base:1.1 pkgsrc-2020Q4:1.1.0.2 pkgsrc-2020Q4-base:1.1; locks; strict; comment @# @; 1.3 date 2023.10.17.12.47.37; author bouyer; state dead; branches; next 1.2; commitid 1uWuFCxsmabEIYIE; 1.2 date 2021.03.30.06.59.03; author bouyer; state Exp; branches; next 1.1; commitid 0qeTE1RWBrm5HiNC; 1.1 date 2020.11.30.14.20.22; author bouyer; state Exp; branches; next ; commitid H410GS52VKnY0VxC; desc @@ 1.3 log @As planned remove xenkernel413 and xentools413. EOL'ed upstream @ text @$NetBSD: patch-fixpvh,v 1.2 2021/03/30 06:59:03 bouyer Exp $ Fix booting dom0 PVH. Debugged by Xen developpers Jan Beulich and Roger Pau Monné diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 64dd0a929c..3eb6102a61 100644 --- xen/drivers/vpci/msix.c.orig +++ xen/drivers/vpci/msix.c @@@@ -370,7 +370,7 @@@@ static int msix_write(struct vcpu *v, unsigned long addr, unsigned int len, entry->updated = false; } - else + else if ( msix->enabled ) vpci_msix_arch_mask_entry(entry, pdev, entry->masked); break; @ 1.2 log @Update xentools413 and xentools413 to 4.13.3. Changes since 4.13.2: inlcude security fixes for all XSA known to date (up to XSA-369). Other minor bug fixes. @ text @d1 1 a1 1 $NetBSD: patch-fixpvh,v 1.1 2020/11/30 14:20:22 bouyer Exp $ @ 1.1 log @Add patch from Xen developers (Jan Beulich and Roger Pau Monné) fixing interrupt issues with pvh dom0. @ text @d1 1 a1 1 $NetBSD: $ a19 38 >From 232112a292c3b82b3063ea6c7aab56afc8e03f67 Mon Sep 17 00:00:00 2001 From: Roger Pau Monne Date: Sat, 28 Nov 2020 15:06:26 +0100 Subject: [PATCH] x86/vioapic: fix usage of index in place of GSI in vioapic_write_redirent MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The usage of idx instead of the GSI in vioapic_write_redirent when accessing gsi_assert_count can cause a PVH dom0 with multiple vIO-APICs to lose interrupts in case a pin of a IO-APIC different than the first one is unmasked with pending interrupts. Switch to use gsi instead to fix the issue. Fixes: 9f44b08f7d0e4 ('x86/vioapic: introduce support for multiple vIO APICS') Signed-off-by: Roger Pau Monné --- xen/arch/x86/hvm/vioapic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 67d4a6237f..e64abee7a9 100644 --- xen/arch/x86/hvm/vioapic.c.orig +++ xen/arch/x86/hvm/vioapic.c @@@@ -260,7 +260,7 @@@@ static void vioapic_write_redirent( pent->fields.remote_irr = 0; else if ( !ent.fields.mask && !ent.fields.remote_irr && - hvm_irq->gsi_assert_count[idx] ) + hvm_irq->gsi_assert_count[gsi] ) { pent->fields.remote_irr = 1; vioapic_deliver(vioapic, idx); -- 2.29.2 @