head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC4:1.1.1.1 netbsd-11-0-RC3:1.1.1.1 gdb-17-1:1.1.1.1 netbsd-11-0-RC2:1.1.1.1 netbsd-11-0-RC1:1.1.1.1 gdb-16-3:1.1.1.1 perseant-exfatfs-base-20250801:1.1.1.1 netbsd-11:1.1.1.1.0.44 netbsd-11-base:1.1.1.1 netbsd-10-1-RELEASE:1.1.1.1 gdb-15-1:1.1.1.1 perseant-exfatfs-base-20240630:1.1.1.1 perseant-exfatfs:1.1.1.1.0.42 perseant-exfatfs-base:1.1.1.1 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.1 netbsd-10-0-RELEASE:1.1.1.1 netbsd-10-0-RC6:1.1.1.1 netbsd-10-0-RC5:1.1.1.1 netbsd-10-0-RC4:1.1.1.1 netbsd-10-0-RC3:1.1.1.1 netbsd-10-0-RC2:1.1.1.1 netbsd-10-0-RC1:1.1.1.1 gdb-13-2:1.1.1.1 netbsd-10:1.1.1.1.0.40 netbsd-10-base:1.1.1.1 netbsd-9-3-RELEASE:1.1.1.1 cjep_sun2x-base1:1.1.1.1 cjep_sun2x:1.1.1.1.0.38 cjep_sun2x-base:1.1.1.1 cjep_staticlib_x-base1:1.1.1.1 netbsd-9-2-RELEASE:1.1.1.1 cjep_staticlib_x:1.1.1.1.0.36 cjep_staticlib_x-base:1.1.1.1 netbsd-9-1-RELEASE:1.1.1.1 GDB-11-0-50-20200914-git:1.1.1.1 phil-wifi-20200421:1.1.1.1 phil-wifi-20200411:1.1.1.1 is-mlppp:1.1.1.1.0.34 is-mlppp-base:1.1.1.1 phil-wifi-20200406:1.1.1.1 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.1 netbsd-9-0-RC2:1.1.1.1 netbsd-9-0-RC1:1.1.1.1 phil-wifi-20191119:1.1.1.1 netbsd-9:1.1.1.1.0.32 netbsd-9-base:1.1.1.1 phil-wifi-20190609:1.1.1.1 netbsd-8-1-RELEASE:1.1.1.1 gdb-8-3:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 pgoyette-compat-merge-20190127:1.1.1.1 pgoyette-compat-20190127:1.1.1.1 pgoyette-compat-20190118:1.1.1.1 pgoyette-compat-1226:1.1.1.1 pgoyette-compat-1126:1.1.1.1 pgoyette-compat-1020:1.1.1.1 pgoyette-compat-0930:1.1.1.1 pgoyette-compat-0906:1.1.1.1 netbsd-7-2-RELEASE:1.1.1.1 pgoyette-compat-0728:1.1.1.1 netbsd-8-0-RELEASE:1.1.1.1 phil-wifi:1.1.1.1.0.30 phil-wifi-base:1.1.1.1 pgoyette-compat-0625:1.1.1.1 netbsd-8-0-RC2:1.1.1.1 pgoyette-compat-0521:1.1.1.1 pgoyette-compat-0502:1.1.1.1 pgoyette-compat-0422:1.1.1.1 netbsd-8-0-RC1:1.1.1.1 pgoyette-compat-0415:1.1.1.1 pgoyette-compat-0407:1.1.1.1 pgoyette-compat-0330:1.1.1.1 pgoyette-compat-0322:1.1.1.1 pgoyette-compat-0315:1.1.1.1 netbsd-7-1-2-RELEASE:1.1.1.1 pgoyette-compat:1.1.1.1.0.28 pgoyette-compat-base:1.1.1.1 netbsd-7-1-1-RELEASE:1.1.1.1 gdb-8-0-1:1.1.1.1 matt-nb8-mediatek:1.1.1.1.0.26 matt-nb8-mediatek-base:1.1.1.1 perseant-stdc-iso10646:1.1.1.1.0.24 perseant-stdc-iso10646-base:1.1.1.1 netbsd-8:1.1.1.1.0.22 netbsd-8-base:1.1.1.1 prg-localcount2-base3:1.1.1.1 prg-localcount2-base2:1.1.1.1 prg-localcount2-base1:1.1.1.1 prg-localcount2:1.1.1.1.0.20 prg-localcount2-base:1.1.1.1 pgoyette-localcount-20170426:1.1.1.1 bouyer-socketcan-base1:1.1.1.1 pgoyette-localcount-20170320:1.1.1.1 netbsd-7-1:1.1.1.1.0.18 netbsd-7-1-RELEASE:1.1.1.1 netbsd-7-1-RC2:1.1.1.1 netbsd-7-nhusb-base-20170116:1.1.1.1 bouyer-socketcan:1.1.1.1.0.16 bouyer-socketcan-base:1.1.1.1 pgoyette-localcount-20170107:1.1.1.1 netbsd-7-1-RC1:1.1.1.1 pgoyette-localcount-20161104:1.1.1.1 netbsd-7-0-2-RELEASE:1.1.1.1 gdb-7-12:1.1.1.1 localcount-20160914:1.1.1.1 netbsd-7-nhusb:1.1.1.1.0.14 netbsd-7-nhusb-base:1.1.1.1 pgoyette-localcount-20160806:1.1.1.1 pgoyette-localcount-20160726:1.1.1.1 pgoyette-localcount:1.1.1.1.0.12 pgoyette-localcount-base:1.1.1.1 netbsd-7-0-1-RELEASE:1.1.1.1 gdb-7-10-1:1.1.1.1 netbsd-7-0:1.1.1.1.0.10 netbsd-7-0-RELEASE:1.1.1.1 gdb-7-9-1:1.1.1.1 netbsd-7-0-RC3:1.1.1.1 netbsd-7-0-RC2:1.1.1.1 netbsd-7-0-RC1:1.1.1.1 tls-maxphys-base:1.1.1.1 tls-maxphys:1.1.1.1.0.8 netbsd-7:1.1.1.1.0.6 netbsd-7-base:1.1.1.1 gdb-7-7-1:1.1.1.1 yamt-pagecache:1.1.1.1.0.4 yamt-pagecache-base9:1.1.1.1 tls-earlyentropy:1.1.1.1.0.2 tls-earlyentropy-base:1.1.1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1 riastradh-drm2-base3:1.1.1.1 gdb-7-6-1:1.1.1.1 FSF:1.1.1; locks; strict; comment @# @; 1.1 date 2013.10.03.15.44.20; author christos; state Exp; branches 1.1.1.1; next ; commitid m91IYDmHTME7wR7x; 1.1.1.1 date 2013.10.03.15.44.20; author christos; state Exp; branches 1.1.1.1.4.1 1.1.1.1.8.1; next ; commitid m91IYDmHTME7wR7x; 1.1.1.1.4.1 date 2013.10.03.15.44.20; author yamt; state dead; branches; next 1.1.1.1.4.2; commitid SRuOnF9k1i4dcyBx; 1.1.1.1.4.2 date 2014.05.22.16.00.32; author yamt; state Exp; branches; next ; commitid SRuOnF9k1i4dcyBx; 1.1.1.1.8.1 date 2013.10.03.15.44.20; author tls; state dead; branches; next 1.1.1.1.8.2; commitid jTnpym9Qu0o4R1Nx; 1.1.1.1.8.2 date 2014.08.19.23.58.39; author tls; state Exp; branches; next ; commitid jTnpym9Qu0o4R1Nx; desc @@ 1.1 log @Initial revision @ text @; Toshiba MeP FMAX Coprocessor description. -*- Scheme -*- ; Copyright 2011 Free Software Foundation, Inc. ; ; Contributed by Red Hat Inc; ; ; This file is part of the GNU Binutils. ; ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 3 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, ; MA 02110-1301, USA. ;------------------------------------------------------------------------------ ; MeP-Integrator will redefine the isa pmacros below to allow the bit widths ; specified below for each ME_MODULE using this coprocessor. ; This coprocessor requires only the 32 bit insns in the core. ;------------------------------------------------------------------------------ ; begin-isas (define-pmacro fmax-core-isa () (ISA ext_core2)) (define-pmacro all-fmax-isas () (ISA ext_core2)) ; end-isas ;****************************************************************************** ; ifields ;------------------------------------------------------------------------------ ; opcodes (dnf f-fmax-0-4 "opcode" (all-fmax-isas) 0 4) (dnf f-fmax-4-4 "opcode" (all-fmax-isas) 4 4) (dnf f-fmax-8-4 "opcode" (all-fmax-isas) 8 4) (dnf f-fmax-12-4 "opcode" (all-fmax-isas) 12 4) (dnf f-fmax-16-4 "opcode" (all-fmax-isas) 16 4) (dnf f-fmax-20-4 "opcode" (all-fmax-isas) 20 4) (dnf f-fmax-24-4 "opcode" (all-fmax-isas) 24 4) (dnf f-fmax-28-1 "opcode" (all-fmax-isas) 28 1) (dnf f-fmax-29-1 "opcode" (all-fmax-isas) 29 1) (dnf f-fmax-30-1 "opcode" (all-fmax-isas) 30 1) (dnf f-fmax-31-1 "opcode" (all-fmax-isas) 31 1) ;------------------------------------------------------------------------------ ; FR registers (define-multi-ifield (name f-fmax-frd) (comment "FRd register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-28-1 f-fmax-4-4) (insert (sequence () (set (ifield f-fmax-4-4) (and (ifield f-fmax-frd) #xf)) (set (ifield f-fmax-28-1) (srl (ifield f-fmax-frd) 4)))) (extract (set (ifield f-fmax-frd) (or (sll (ifield f-fmax-28-1) 4) (ifield f-fmax-4-4)))) ) (define-multi-ifield (name f-fmax-frn) (comment "FRn register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-29-1 f-fmax-20-4) (insert (sequence () (set (ifield f-fmax-20-4) (and (ifield f-fmax-frn) #xf)) (set (ifield f-fmax-29-1) (srl (ifield f-fmax-frn) 4)))) (extract (set (ifield f-fmax-frn) (or (sll (ifield f-fmax-29-1) 4) (ifield f-fmax-20-4)))) ) (define-multi-ifield (name f-fmax-frm) (comment "FRm register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-30-1 f-fmax-24-4) (insert (sequence () (set (ifield f-fmax-24-4) (and (ifield f-fmax-frm) #xf)) (set (ifield f-fmax-30-1) (srl (ifield f-fmax-frm) 4)))) (extract (set (ifield f-fmax-frm) (or (sll (ifield f-fmax-30-1) 4) (ifield f-fmax-24-4)))) ) ;------------------------------------------------------------------------------ ; Core General registers (dnf f-fmax-rm "opcode" (all-fmax-isas) 8 4) ;------------------------------------------------------------------------------ ; Condition opcodes enum (define-normal-insn-enum fmax-cond "condition opcode enum" (all-fmax-isas) FMAX_ f-fmax-8-4 ("f" "u" "e" "ue" "l" "ul" "le" "ule" "fi" "ui" "ei" "uei" "li" "uli" "lei" "ulei") ) ;****************************************************************************** ; Hardware ;------------------------------------------------------------------------------ ; FR registers ; Given a coprocessor register number N, expand to a ; name/index pair: ($frN N) (define-pmacro (-fmax-fr-reg-pair n) ((.sym "fr" n) n)) (define-pmacro (-fmax-cr-reg-pair n) ((.sym "c" n) n)) ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. ; GDB will use the hardware table generated from this declaration. The operands use h-cr ; from mep-core.cpu so that SID's semantic trace will be consistent between ; the core and the coprocessor but use parse/print handlers which reference the hardware table ; generated from this declarations (define-hardware (name h-cr-fmax) (comment "Floating point registers") (attrs all-fmax-isas VIRTUAL IS_FLOAT) (type register SF (32)) (indices keyword "$" (.splice (.unsplice (.map -fmax-fr-reg-pair (.iota 32))) (.unsplice (.map -fmax-cr-reg-pair (.iota 32)))) ) (get (index) (c-call SF "fmax_fr_get_handler" index)) (set (index newval) (c-call VOID "fmax_fr_set_handler" index newval)) ) ;------------------------------------------------------------------------------ ; Control registers ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. ; GDB will use the hardware table generated from this declaration. The operands use h-ccr ; from mep-core.cpu so that SID's semantic trace will be consistent between ; the core and the coprocessor but use parse/print handlers which reference the hardware table ; generated from this declarations (define-hardware (name h-ccr-fmax) (comment "Coprocessor Identifier and Revision Register") (attrs all-fmax-isas VIRTUAL) (type register USI (16)) (indices keyword "$" ( ("cirr" 0) ("fcr0" 0) ("ccr0" 0) ("cbcr" 1) ("fcr1" 1) ("ccr1" 1) ("cerr" 15) ("fcr15" 15) ("ccr15" 15) ) ) (set (index newval) (c-call VOID "h_ccr_set" index newval)) (get (index) (c-call SI "h_ccr_get" index)) ) ;------------------------------------------------------------------------------ ; Misc (define-hardware (name h-fmax-compare-i-p) (comment "flag") (attrs all-fmax-isas) (type register USI) ) ;****************************************************************************** ; Operands ;------------------------------------------------------------------------------ ; FR Registers (define-full-operand fmax-FRd "FRd" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frd ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRn "FRn" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frn ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRm "FRm" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frm ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRd-int "FRd as an integer" (all-fmax-isas (CDATA FMAX_INT)) h-cr SI f-fmax-frd ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRn-int "FRn as an integer" (all-fmax-isas (CDATA FMAX_INT)) h-cr SI f-fmax-frn ((parse "fmax_cr") (print "fmax_cr")) () ()) ;------------------------------------------------------------------------------ ; Control registers (define-full-operand fmax-CCRn "CCRn" (all-fmax-isas (CDATA REGNUM)) h-ccr DFLT f-fmax-4-4 ((parse "fmax_ccr") (print "fmax_ccr")) () ()) (dnop fmax-CIRR "CIRR" (all-fmax-isas SEM-ONLY) h-ccr 0) (dnop fmax-CBCR "CBCR" (all-fmax-isas SEM-ONLY) h-ccr 1) (dnop fmax-CERR "CERR" (all-fmax-isas SEM-ONLY) h-ccr 15) ;------------------------------------------------------------------------------ ; Core General Registers (dnop fmax-Rm "Rm" (all-fmax-isas) h-gpr f-fmax-rm) ;------------------------------------------------------------------------------ ; misc (dnop fmax-Compare-i-p "flag" (all-fmax-isas SEM-ONLY) h-fmax-compare-i-p f-nil) ;****************************************************************************** ; Instructions ;------------------------------------------------------------------------------ ; Binary Arithmetic (define-pmacro (fmax-binary-arith op opc sem) (dni op (.str op " FRd,FRn,FRm") (all-fmax-isas MAY_TRAP) (.str op " ${fmax-FRd},${fmax-FRn},${fmax-FRm}") (+ (f-fmax-0-4 #xF) fmax-FRd (f-fmax-8-4 opc) (f-fmax-12-4 #x7) (f-fmax-16-4 0) fmax-FRn fmax-FRm (f-fmax-31-1 0)) sem () ) ) (fmax-binary-arith fadds #x0 (set fmax-FRd (add fmax-FRn fmax-FRm))) (fmax-binary-arith fsubs #x1 (set fmax-FRd (sub fmax-FRn fmax-FRm))) (fmax-binary-arith fmuls #x2 (set fmax-FRd (mul fmax-FRn fmax-FRm))) (fmax-binary-arith fdivs #x3 (set fmax-FRd (div fmax-FRn fmax-FRm))) ;------------------------------------------------------------------------------ ; Unary Arithmetic (define-pmacro (fmax-unary-arith op opc sem) (dni op (.str op " FRd,FRn") (all-fmax-isas MAY_TRAP) (.str op " ${fmax-FRd},${fmax-FRn}") (+ (f-fmax-0-4 #xF) fmax-FRd (f-fmax-8-4 opc) (f-fmax-12-4 #x7) (f-fmax-16-4 0) fmax-FRn (f-fmax-24-4 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) sem () ) ) (fmax-unary-arith fsqrts #x4 (set fmax-FRd (sqrt fmax-FRn))) (fmax-unary-arith fabss #x5 (set fmax-FRd (abs fmax-FRn))) (fmax-unary-arith fnegs #x7 (set fmax-FRd (neg fmax-FRn))) (fmax-unary-arith fmovs #x6 (set fmax-FRd fmax-FRn)) ;------------------------------------------------------------------------------ ; Conversions (define-pmacro (fmax-conv op opc1 opc2 opnd1 opnd2 sem) (dni op (.str op " FRd,FRn") (all-fmax-isas MAY_TRAP) (.str op " ${" opnd1 "},${" opnd2 "}") (+ (f-fmax-0-4 #xF) opnd1 (f-fmax-8-4 opc1) (f-fmax-12-4 #x7) (f-fmax-16-4 opc2) opnd2 (f-fmax-24-4 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) sem () ) ) (fmax-conv froundws #xC #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_froundws" fmax-FRn))) (fmax-conv ftruncws #xD #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ftruncws" fmax-FRn))) (fmax-conv fceilws #xE #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fceilws" fmax-FRn))) (fmax-conv ffloorws #xF #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ffloorws" fmax-FRn))) (fmax-conv fcvtws #x4 #x1 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fcvtws" fmax-FRn))) (fmax-conv fcvtsw #x0 #x9 fmax-FRd fmax-FRn-int (set fmax-FRd (float SF FPCONV-DEFAULT fmax-FRn-int))) ;------------------------------------------------------------------------------ ; Comparisons ; ; Comparison with no exceptions (define-pmacro (fmax-f-sem x y) (andif (gt x y) (lt x y))) ; do this to get exception detection (define-pmacro (fmax-u-sem x y) (not (orif (lt x y) (orif (eq x y) (gt x y))))) (define-pmacro (fmax-e-sem x y) (eq x y)) (define-pmacro (fmax-ue-sem x y) (not (orif (lt x y) (gt x y)))) (define-pmacro (fmax-l-sem x y) (lt x y)) (define-pmacro (fmax-ul-sem x y) (not (orif (gt x y) (eq x y)))) (define-pmacro (fmax-le-sem x y) (orif (lt x y) (eq x y))) (define-pmacro (fmax-ule-sem x y) (not (gt x y))) (define-pmacro (fmax-comp cond suffix exceptions) (dni (.sym fcmp cond suffix s) (.str "fcmp" cond suffix "s FRn,FRm") ;; Even though the instruction doesn't really trap if EXCEPTIONS ;; is zero, we don't want gcc to put it in a repeat or erepeat ;; block because of the hazards between fcmp instructions and ;; anything that reads CBCR. (all-fmax-isas MAY_TRAP) (.str "fcmp" cond suffix "s ${fmax-FRn},${fmax-FRm}") (+ (f-fmax-0-4 #xF) (f-fmax-4-4 0) (.sym FMAX_ cond suffix) (f-fmax-12-4 #x7) (f-fmax-16-4 #x2) (f-fmax-28-1 0) fmax-FRn fmax-FRm (f-fmax-31-1 0)) (sequence () (set fmax-Compare-i-p exceptions) (set fmax-CBCR ((.sym fmax- cond -sem) fmax-FRn fmax-FRm)) (set fmax-Compare-i-p 0) ) () ) ) ; Comparison with no exceptions (fmax-comp f "" 0) (fmax-comp u "" 0) (fmax-comp e "" 0) (fmax-comp ue "" 0) (fmax-comp l "" 0) (fmax-comp ul "" 0) (fmax-comp le "" 0) (fmax-comp ule "" 0) ; Comparison with exceptions (fmax-comp f i 1) (fmax-comp u i 1) (fmax-comp e i 1) (fmax-comp ue i 1) (fmax-comp l i 1) (fmax-comp ul i 1) (fmax-comp le i 1) (fmax-comp ule i 1) ;------------------------------------------------------------------------------ ; Move to/from core registers (dni cmov-frn-rm "cmov FRn,Rm" (all-fmax-isas (INTRINSIC "cmov1")) "cmov ${fmax-FRd-int},${fmax-Rm}" (+ (f-fmax-0-4 #xF) fmax-FRd-int fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-29-1 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) (set fmax-FRd-int fmax-Rm) () ) (dni cmov-rm-frn "cmov Rm,FRn" (all-fmax-isas (INTRINSIC "cmov2")) "cmov ${fmax-Rm},${fmax-FRd-int}" (+ (f-fmax-0-4 #xF) fmax-FRd-int fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-29-1 0) (f-fmax-30-1 0) (f-fmax-31-1 1)) (set fmax-Rm fmax-FRd-int) () ) (dni cmovc-ccrn-rm "cmovc CCRn,Rm" (all-fmax-isas (INTRINSIC "cmovc1")) "cmovc ${fmax-CCRn},${fmax-Rm}" (+ (f-fmax-0-4 #xF) fmax-CCRn fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-28-1 0) (f-fmax-29-1 0) (f-fmax-30-1 1) (f-fmax-31-1 0)) (set fmax-CCRn fmax-Rm) () ) (dni cmovc-rm-ccrn "cmovc Rm,CCRn" (all-fmax-isas (INTRINSIC "cmovc2")) "cmovc ${fmax-Rm},${fmax-CCRn}" (+ (f-fmax-0-4 #xF) fmax-CCRn fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-28-1 0) (f-fmax-29-1 0) (f-fmax-30-1 1) (f-fmax-31-1 1)) (set fmax-Rm fmax-CCRn) () ) @ 1.1.1.1 log @Import gdb 7.6.1 News from: http://sourceware.org/gdb/news: August 30th, 2013: GDB 7.6.1 Released! The latest version of GDB, version 7.6.1, is available for download. This is a minor corrective release over GDB 7.6, fixing the following issues: PR tdep/15420 (Cannot debug threaded programs on newer versions of x86-solaris - Solaris 10, Update 10 or later) PR remote/15455 (QTro remote packet broken) PR build/15476 (Build failure due to incomplete enum type in utils.h) PR server/15594 (tls support in 64x32 x86 gdbserver doesn't extend address to 64 bit) PR server/15075 (dprintf inteferes with "next") PR server/15434 (dprintf uses a synchronous 'continue' even in non-stop mode) PR tui/14880 (In split register layouts, up results in assertion failure in value.c) PR c++/15519 (GDB 7.6 is 94x slower than GDB 7.5.1 using a certain core file) PR gdb/15837 (GDB prints entry values for local variables) PR gdb/15415 (gdb resolves symbolic links when passing argv[0]) PR cli/15603 (CTRL-C can no longer interrupt inferior) PR gdb/15604 (gdbserver socket leak 7.5 regression) April 26th, 2013: GDB 7.6 Released! The latest version of GDB, version 7.6, is available for download. Changes in this release include: New native configurations (ARM AArch64 GNU/Linux, FreeBSD/powerpc, 86_64/Cygwin and Tilera TILE-Gx GNU/Linux) New target configurations (ARM AArch64, ARM AArch64 GNU/Linux, Lynx 178 PowerPC, x86_64/Cygwin, and Tilera TILE-Gx GNU/Linux) Support for the "mini debuginfo" section, .gnu_debugdata The C++ ABI now defaults to the GNU v3 ABI More Python scripting improvements Some GDB/MI improvements New configure options, new commands, and options New remote packets A new "target record-btrace" has been added while the "target record" command has been renamed to "target record-full" See the NEWS file for a more complete and detailed list of what this release includes. March 12th, 2013: GDB 7.6 branch created The GDB 7.6 branch (gdb_7_6-branch) has been created. To check out a copy of the branch use: cvs -d :pserver:anoncvs@@sourceware.org:/cvs/src co -r gdb_7_6-branch gdb November 29th, 2012: GDB 7.5.1 Released! The latest version of GDB, version 7.5.1, is available for download. This is a minor corrective release over GDB 7.5, fixing the following issues: An "Attempt to dereference a generic pointer" errors (-var-create). Backtrace problems on x32 (PR backtrace/14646). next/step/finish problems on x32 (PR gdb/14647). A "malformed linespec error: unexpected keyword, [...]" error (PR breakpoints/14643). GDB crash while stepping through powerpc (32bits) code. A failed assertion in linux_ptrace_test_ret_to_nx. A "!frame_id_inlined_p (frame_id)" failed assertion. A "No more reverse-execution history." error during reverse "next" execution (PR 14548). Incomplete command descriptions in "apropos" output. PR gdb/14494 (a GDB crash difficult to characterize). Various build warnings. August 17th, 2012: GDB 7.5 Released! The latest version of GDB, version 7.5, is available for download. Changes in this release include: Go language support. New targets (x32 ABI, microMIPS, Renesas RL78, HP OpenVMS ia64). More Python scripting improvements. SDT (Static Defined Tracing) probes support with SystemTap probes. GDBserver improvements (stdio connections, target-side evaluation of breakpoint conditions, remote protocol improvements). Other miscellaneous improvements (ability to stop when a shared library is loaded/unloaded, dynamic printf, etc). Reverse debugging on ARM. The binary "gdbtui" has been abandoned and can no longer be built. Use "gdb -tui" instead. See the NEWS file for a more complete and detailed list of what this release includes. July 17th, 2012: GDB 7.5 branch created The GDB 7.5 branch (gdb_7_5-branch) has been created. To check out a copy of the branch use: cvs -d :pserver:anoncvs@@sourceware.org:/cvs/src co -r gdb_7_5-branch gdb April 26th, 2012: GDB 7.4.1 Released! The latest version of GDB, version 7.4.1, is available for download. This is a minor corrective release over GDB 7.4, fixing the following issues: [GDB/MI] Error when resuming program execution in all-stop mode ("Cannot execute this command without a live selected thread"). [Pascal] Polluted display of class methods parameters. [target remote] Errror when connecting to remote target where disconnected tracing is in effect. [AVX] Float and ymm* register values not available. [GDB] Crash when using the "finish" command. [build] makeinfo should not be required to build GDB. January 24th, 2012: GDB 7.4 Released! The latest version of GDB, version 7.4, is available for download. Changes in this release include: Many Python scripting improvements Better support for ambiguous linespecs Masked watchpoints Tracepoint support improvements Support for Texas Instruments TMS320C6x (tic6x-*-*) A Renesas RL78 simulator (rl78-*-elf) Some minor Remote protocol extensions and GDB/MI changes See the NEWS file for a more complete and detailed list of what this release includes. Note that the gdbtui binary is deprecated, starting with GDB 7.5. Use "gdb -tui" instead. January 9, 2012: Extensibility support using Guile GDB ought to support extensibility using Guile, the GNU extensibility package (an implementation of Scheme). We are looking for people to write the code to interface the two. Please write to gdb-patches AT sourceware DOT org if you are interested. December 13, 2011: GDB 7.4 branch created The GDB 7.4 branch (gdb_7_4-branch) has been created. To check out a copy of the branch use: cvs -d :pserver:anoncvs@@sourceware.org:/cvs/src co -r gdb_7_4-branch gdb September 30, 2011: Release Mistakes in GDB Versions 6.0 - 7.3 A mistake has been detected in the release tar files for all GDB releases from version 6.0 to version 7.3 (included). The mistake has been corrected, and the FSF issued the following announcements: Making up for a release mistake in GDB versions 6.0 - 6.6 Making up for a release mistake in GDB versions 6.7 - 7.3 @ text @@ 1.1.1.1.8.1 log @file mep-fmax.cpu was added on branch tls-maxphys on 2014-08-19 23:58:39 +0000 @ text @d1 340 @ 1.1.1.1.8.2 log @Rebase to HEAD as of a few days ago. @ text @a0 340 ; Toshiba MeP FMAX Coprocessor description. -*- Scheme -*- ; Copyright 2011 Free Software Foundation, Inc. ; ; Contributed by Red Hat Inc; ; ; This file is part of the GNU Binutils. ; ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 3 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, ; MA 02110-1301, USA. ;------------------------------------------------------------------------------ ; MeP-Integrator will redefine the isa pmacros below to allow the bit widths ; specified below for each ME_MODULE using this coprocessor. ; This coprocessor requires only the 32 bit insns in the core. ;------------------------------------------------------------------------------ ; begin-isas (define-pmacro fmax-core-isa () (ISA ext_core2)) (define-pmacro all-fmax-isas () (ISA ext_core2)) ; end-isas ;****************************************************************************** ; ifields ;------------------------------------------------------------------------------ ; opcodes (dnf f-fmax-0-4 "opcode" (all-fmax-isas) 0 4) (dnf f-fmax-4-4 "opcode" (all-fmax-isas) 4 4) (dnf f-fmax-8-4 "opcode" (all-fmax-isas) 8 4) (dnf f-fmax-12-4 "opcode" (all-fmax-isas) 12 4) (dnf f-fmax-16-4 "opcode" (all-fmax-isas) 16 4) (dnf f-fmax-20-4 "opcode" (all-fmax-isas) 20 4) (dnf f-fmax-24-4 "opcode" (all-fmax-isas) 24 4) (dnf f-fmax-28-1 "opcode" (all-fmax-isas) 28 1) (dnf f-fmax-29-1 "opcode" (all-fmax-isas) 29 1) (dnf f-fmax-30-1 "opcode" (all-fmax-isas) 30 1) (dnf f-fmax-31-1 "opcode" (all-fmax-isas) 31 1) ;------------------------------------------------------------------------------ ; FR registers (define-multi-ifield (name f-fmax-frd) (comment "FRd register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-28-1 f-fmax-4-4) (insert (sequence () (set (ifield f-fmax-4-4) (and (ifield f-fmax-frd) #xf)) (set (ifield f-fmax-28-1) (srl (ifield f-fmax-frd) 4)))) (extract (set (ifield f-fmax-frd) (or (sll (ifield f-fmax-28-1) 4) (ifield f-fmax-4-4)))) ) (define-multi-ifield (name f-fmax-frn) (comment "FRn register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-29-1 f-fmax-20-4) (insert (sequence () (set (ifield f-fmax-20-4) (and (ifield f-fmax-frn) #xf)) (set (ifield f-fmax-29-1) (srl (ifield f-fmax-frn) 4)))) (extract (set (ifield f-fmax-frn) (or (sll (ifield f-fmax-29-1) 4) (ifield f-fmax-20-4)))) ) (define-multi-ifield (name f-fmax-frm) (comment "FRm register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-30-1 f-fmax-24-4) (insert (sequence () (set (ifield f-fmax-24-4) (and (ifield f-fmax-frm) #xf)) (set (ifield f-fmax-30-1) (srl (ifield f-fmax-frm) 4)))) (extract (set (ifield f-fmax-frm) (or (sll (ifield f-fmax-30-1) 4) (ifield f-fmax-24-4)))) ) ;------------------------------------------------------------------------------ ; Core General registers (dnf f-fmax-rm "opcode" (all-fmax-isas) 8 4) ;------------------------------------------------------------------------------ ; Condition opcodes enum (define-normal-insn-enum fmax-cond "condition opcode enum" (all-fmax-isas) FMAX_ f-fmax-8-4 ("f" "u" "e" "ue" "l" "ul" "le" "ule" "fi" "ui" "ei" "uei" "li" "uli" "lei" "ulei") ) ;****************************************************************************** ; Hardware ;------------------------------------------------------------------------------ ; FR registers ; Given a coprocessor register number N, expand to a ; name/index pair: ($frN N) (define-pmacro (-fmax-fr-reg-pair n) ((.sym "fr" n) n)) (define-pmacro (-fmax-cr-reg-pair n) ((.sym "c" n) n)) ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. ; GDB will use the hardware table generated from this declaration. The operands use h-cr ; from mep-core.cpu so that SID's semantic trace will be consistent between ; the core and the coprocessor but use parse/print handlers which reference the hardware table ; generated from this declarations (define-hardware (name h-cr-fmax) (comment "Floating point registers") (attrs all-fmax-isas VIRTUAL IS_FLOAT) (type register SF (32)) (indices keyword "$" (.splice (.unsplice (.map -fmax-fr-reg-pair (.iota 32))) (.unsplice (.map -fmax-cr-reg-pair (.iota 32)))) ) (get (index) (c-call SF "fmax_fr_get_handler" index)) (set (index newval) (c-call VOID "fmax_fr_set_handler" index newval)) ) ;------------------------------------------------------------------------------ ; Control registers ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. ; GDB will use the hardware table generated from this declaration. The operands use h-ccr ; from mep-core.cpu so that SID's semantic trace will be consistent between ; the core and the coprocessor but use parse/print handlers which reference the hardware table ; generated from this declarations (define-hardware (name h-ccr-fmax) (comment "Coprocessor Identifier and Revision Register") (attrs all-fmax-isas VIRTUAL) (type register USI (16)) (indices keyword "$" ( ("cirr" 0) ("fcr0" 0) ("ccr0" 0) ("cbcr" 1) ("fcr1" 1) ("ccr1" 1) ("cerr" 15) ("fcr15" 15) ("ccr15" 15) ) ) (set (index newval) (c-call VOID "h_ccr_set" index newval)) (get (index) (c-call SI "h_ccr_get" index)) ) ;------------------------------------------------------------------------------ ; Misc (define-hardware (name h-fmax-compare-i-p) (comment "flag") (attrs all-fmax-isas) (type register USI) ) ;****************************************************************************** ; Operands ;------------------------------------------------------------------------------ ; FR Registers (define-full-operand fmax-FRd "FRd" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frd ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRn "FRn" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frn ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRm "FRm" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frm ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRd-int "FRd as an integer" (all-fmax-isas (CDATA FMAX_INT)) h-cr SI f-fmax-frd ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRn-int "FRn as an integer" (all-fmax-isas (CDATA FMAX_INT)) h-cr SI f-fmax-frn ((parse "fmax_cr") (print "fmax_cr")) () ()) ;------------------------------------------------------------------------------ ; Control registers (define-full-operand fmax-CCRn "CCRn" (all-fmax-isas (CDATA REGNUM)) h-ccr DFLT f-fmax-4-4 ((parse "fmax_ccr") (print "fmax_ccr")) () ()) (dnop fmax-CIRR "CIRR" (all-fmax-isas SEM-ONLY) h-ccr 0) (dnop fmax-CBCR "CBCR" (all-fmax-isas SEM-ONLY) h-ccr 1) (dnop fmax-CERR "CERR" (all-fmax-isas SEM-ONLY) h-ccr 15) ;------------------------------------------------------------------------------ ; Core General Registers (dnop fmax-Rm "Rm" (all-fmax-isas) h-gpr f-fmax-rm) ;------------------------------------------------------------------------------ ; misc (dnop fmax-Compare-i-p "flag" (all-fmax-isas SEM-ONLY) h-fmax-compare-i-p f-nil) ;****************************************************************************** ; Instructions ;------------------------------------------------------------------------------ ; Binary Arithmetic (define-pmacro (fmax-binary-arith op opc sem) (dni op (.str op " FRd,FRn,FRm") (all-fmax-isas MAY_TRAP) (.str op " ${fmax-FRd},${fmax-FRn},${fmax-FRm}") (+ (f-fmax-0-4 #xF) fmax-FRd (f-fmax-8-4 opc) (f-fmax-12-4 #x7) (f-fmax-16-4 0) fmax-FRn fmax-FRm (f-fmax-31-1 0)) sem () ) ) (fmax-binary-arith fadds #x0 (set fmax-FRd (add fmax-FRn fmax-FRm))) (fmax-binary-arith fsubs #x1 (set fmax-FRd (sub fmax-FRn fmax-FRm))) (fmax-binary-arith fmuls #x2 (set fmax-FRd (mul fmax-FRn fmax-FRm))) (fmax-binary-arith fdivs #x3 (set fmax-FRd (div fmax-FRn fmax-FRm))) ;------------------------------------------------------------------------------ ; Unary Arithmetic (define-pmacro (fmax-unary-arith op opc sem) (dni op (.str op " FRd,FRn") (all-fmax-isas MAY_TRAP) (.str op " ${fmax-FRd},${fmax-FRn}") (+ (f-fmax-0-4 #xF) fmax-FRd (f-fmax-8-4 opc) (f-fmax-12-4 #x7) (f-fmax-16-4 0) fmax-FRn (f-fmax-24-4 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) sem () ) ) (fmax-unary-arith fsqrts #x4 (set fmax-FRd (sqrt fmax-FRn))) (fmax-unary-arith fabss #x5 (set fmax-FRd (abs fmax-FRn))) (fmax-unary-arith fnegs #x7 (set fmax-FRd (neg fmax-FRn))) (fmax-unary-arith fmovs #x6 (set fmax-FRd fmax-FRn)) ;------------------------------------------------------------------------------ ; Conversions (define-pmacro (fmax-conv op opc1 opc2 opnd1 opnd2 sem) (dni op (.str op " FRd,FRn") (all-fmax-isas MAY_TRAP) (.str op " ${" opnd1 "},${" opnd2 "}") (+ (f-fmax-0-4 #xF) opnd1 (f-fmax-8-4 opc1) (f-fmax-12-4 #x7) (f-fmax-16-4 opc2) opnd2 (f-fmax-24-4 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) sem () ) ) (fmax-conv froundws #xC #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_froundws" fmax-FRn))) (fmax-conv ftruncws #xD #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ftruncws" fmax-FRn))) (fmax-conv fceilws #xE #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fceilws" fmax-FRn))) (fmax-conv ffloorws #xF #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ffloorws" fmax-FRn))) (fmax-conv fcvtws #x4 #x1 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fcvtws" fmax-FRn))) (fmax-conv fcvtsw #x0 #x9 fmax-FRd fmax-FRn-int (set fmax-FRd (float SF FPCONV-DEFAULT fmax-FRn-int))) ;------------------------------------------------------------------------------ ; Comparisons ; ; Comparison with no exceptions (define-pmacro (fmax-f-sem x y) (andif (gt x y) (lt x y))) ; do this to get exception detection (define-pmacro (fmax-u-sem x y) (not (orif (lt x y) (orif (eq x y) (gt x y))))) (define-pmacro (fmax-e-sem x y) (eq x y)) (define-pmacro (fmax-ue-sem x y) (not (orif (lt x y) (gt x y)))) (define-pmacro (fmax-l-sem x y) (lt x y)) (define-pmacro (fmax-ul-sem x y) (not (orif (gt x y) (eq x y)))) (define-pmacro (fmax-le-sem x y) (orif (lt x y) (eq x y))) (define-pmacro (fmax-ule-sem x y) (not (gt x y))) (define-pmacro (fmax-comp cond suffix exceptions) (dni (.sym fcmp cond suffix s) (.str "fcmp" cond suffix "s FRn,FRm") ;; Even though the instruction doesn't really trap if EXCEPTIONS ;; is zero, we don't want gcc to put it in a repeat or erepeat ;; block because of the hazards between fcmp instructions and ;; anything that reads CBCR. (all-fmax-isas MAY_TRAP) (.str "fcmp" cond suffix "s ${fmax-FRn},${fmax-FRm}") (+ (f-fmax-0-4 #xF) (f-fmax-4-4 0) (.sym FMAX_ cond suffix) (f-fmax-12-4 #x7) (f-fmax-16-4 #x2) (f-fmax-28-1 0) fmax-FRn fmax-FRm (f-fmax-31-1 0)) (sequence () (set fmax-Compare-i-p exceptions) (set fmax-CBCR ((.sym fmax- cond -sem) fmax-FRn fmax-FRm)) (set fmax-Compare-i-p 0) ) () ) ) ; Comparison with no exceptions (fmax-comp f "" 0) (fmax-comp u "" 0) (fmax-comp e "" 0) (fmax-comp ue "" 0) (fmax-comp l "" 0) (fmax-comp ul "" 0) (fmax-comp le "" 0) (fmax-comp ule "" 0) ; Comparison with exceptions (fmax-comp f i 1) (fmax-comp u i 1) (fmax-comp e i 1) (fmax-comp ue i 1) (fmax-comp l i 1) (fmax-comp ul i 1) (fmax-comp le i 1) (fmax-comp ule i 1) ;------------------------------------------------------------------------------ ; Move to/from core registers (dni cmov-frn-rm "cmov FRn,Rm" (all-fmax-isas (INTRINSIC "cmov1")) "cmov ${fmax-FRd-int},${fmax-Rm}" (+ (f-fmax-0-4 #xF) fmax-FRd-int fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-29-1 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) (set fmax-FRd-int fmax-Rm) () ) (dni cmov-rm-frn "cmov Rm,FRn" (all-fmax-isas (INTRINSIC "cmov2")) "cmov ${fmax-Rm},${fmax-FRd-int}" (+ (f-fmax-0-4 #xF) fmax-FRd-int fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-29-1 0) (f-fmax-30-1 0) (f-fmax-31-1 1)) (set fmax-Rm fmax-FRd-int) () ) (dni cmovc-ccrn-rm "cmovc CCRn,Rm" (all-fmax-isas (INTRINSIC "cmovc1")) "cmovc ${fmax-CCRn},${fmax-Rm}" (+ (f-fmax-0-4 #xF) fmax-CCRn fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-28-1 0) (f-fmax-29-1 0) (f-fmax-30-1 1) (f-fmax-31-1 0)) (set fmax-CCRn fmax-Rm) () ) (dni cmovc-rm-ccrn "cmovc Rm,CCRn" (all-fmax-isas (INTRINSIC "cmovc2")) "cmovc ${fmax-Rm},${fmax-CCRn}" (+ (f-fmax-0-4 #xF) fmax-CCRn fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-28-1 0) (f-fmax-29-1 0) (f-fmax-30-1 1) (f-fmax-31-1 1)) (set fmax-Rm fmax-CCRn) () ) @ 1.1.1.1.4.1 log @file mep-fmax.cpu was added on branch yamt-pagecache on 2014-05-22 16:00:32 +0000 @ text @d1 340 @ 1.1.1.1.4.2 log @sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments") @ text @a0 340 ; Toshiba MeP FMAX Coprocessor description. -*- Scheme -*- ; Copyright 2011 Free Software Foundation, Inc. ; ; Contributed by Red Hat Inc; ; ; This file is part of the GNU Binutils. ; ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by ; the Free Software Foundation; either version 3 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, ; MA 02110-1301, USA. ;------------------------------------------------------------------------------ ; MeP-Integrator will redefine the isa pmacros below to allow the bit widths ; specified below for each ME_MODULE using this coprocessor. ; This coprocessor requires only the 32 bit insns in the core. ;------------------------------------------------------------------------------ ; begin-isas (define-pmacro fmax-core-isa () (ISA ext_core2)) (define-pmacro all-fmax-isas () (ISA ext_core2)) ; end-isas ;****************************************************************************** ; ifields ;------------------------------------------------------------------------------ ; opcodes (dnf f-fmax-0-4 "opcode" (all-fmax-isas) 0 4) (dnf f-fmax-4-4 "opcode" (all-fmax-isas) 4 4) (dnf f-fmax-8-4 "opcode" (all-fmax-isas) 8 4) (dnf f-fmax-12-4 "opcode" (all-fmax-isas) 12 4) (dnf f-fmax-16-4 "opcode" (all-fmax-isas) 16 4) (dnf f-fmax-20-4 "opcode" (all-fmax-isas) 20 4) (dnf f-fmax-24-4 "opcode" (all-fmax-isas) 24 4) (dnf f-fmax-28-1 "opcode" (all-fmax-isas) 28 1) (dnf f-fmax-29-1 "opcode" (all-fmax-isas) 29 1) (dnf f-fmax-30-1 "opcode" (all-fmax-isas) 30 1) (dnf f-fmax-31-1 "opcode" (all-fmax-isas) 31 1) ;------------------------------------------------------------------------------ ; FR registers (define-multi-ifield (name f-fmax-frd) (comment "FRd register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-28-1 f-fmax-4-4) (insert (sequence () (set (ifield f-fmax-4-4) (and (ifield f-fmax-frd) #xf)) (set (ifield f-fmax-28-1) (srl (ifield f-fmax-frd) 4)))) (extract (set (ifield f-fmax-frd) (or (sll (ifield f-fmax-28-1) 4) (ifield f-fmax-4-4)))) ) (define-multi-ifield (name f-fmax-frn) (comment "FRn register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-29-1 f-fmax-20-4) (insert (sequence () (set (ifield f-fmax-20-4) (and (ifield f-fmax-frn) #xf)) (set (ifield f-fmax-29-1) (srl (ifield f-fmax-frn) 4)))) (extract (set (ifield f-fmax-frn) (or (sll (ifield f-fmax-29-1) 4) (ifield f-fmax-20-4)))) ) (define-multi-ifield (name f-fmax-frm) (comment "FRm register") (attrs all-fmax-isas) (mode UINT) (subfields f-fmax-30-1 f-fmax-24-4) (insert (sequence () (set (ifield f-fmax-24-4) (and (ifield f-fmax-frm) #xf)) (set (ifield f-fmax-30-1) (srl (ifield f-fmax-frm) 4)))) (extract (set (ifield f-fmax-frm) (or (sll (ifield f-fmax-30-1) 4) (ifield f-fmax-24-4)))) ) ;------------------------------------------------------------------------------ ; Core General registers (dnf f-fmax-rm "opcode" (all-fmax-isas) 8 4) ;------------------------------------------------------------------------------ ; Condition opcodes enum (define-normal-insn-enum fmax-cond "condition opcode enum" (all-fmax-isas) FMAX_ f-fmax-8-4 ("f" "u" "e" "ue" "l" "ul" "le" "ule" "fi" "ui" "ei" "uei" "li" "uli" "lei" "ulei") ) ;****************************************************************************** ; Hardware ;------------------------------------------------------------------------------ ; FR registers ; Given a coprocessor register number N, expand to a ; name/index pair: ($frN N) (define-pmacro (-fmax-fr-reg-pair n) ((.sym "fr" n) n)) (define-pmacro (-fmax-cr-reg-pair n) ((.sym "c" n) n)) ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. ; GDB will use the hardware table generated from this declaration. The operands use h-cr ; from mep-core.cpu so that SID's semantic trace will be consistent between ; the core and the coprocessor but use parse/print handlers which reference the hardware table ; generated from this declarations (define-hardware (name h-cr-fmax) (comment "Floating point registers") (attrs all-fmax-isas VIRTUAL IS_FLOAT) (type register SF (32)) (indices keyword "$" (.splice (.unsplice (.map -fmax-fr-reg-pair (.iota 32))) (.unsplice (.map -fmax-cr-reg-pair (.iota 32)))) ) (get (index) (c-call SF "fmax_fr_get_handler" index)) (set (index newval) (c-call VOID "fmax_fr_set_handler" index newval)) ) ;------------------------------------------------------------------------------ ; Control registers ; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor. ; GDB will use the hardware table generated from this declaration. The operands use h-ccr ; from mep-core.cpu so that SID's semantic trace will be consistent between ; the core and the coprocessor but use parse/print handlers which reference the hardware table ; generated from this declarations (define-hardware (name h-ccr-fmax) (comment "Coprocessor Identifier and Revision Register") (attrs all-fmax-isas VIRTUAL) (type register USI (16)) (indices keyword "$" ( ("cirr" 0) ("fcr0" 0) ("ccr0" 0) ("cbcr" 1) ("fcr1" 1) ("ccr1" 1) ("cerr" 15) ("fcr15" 15) ("ccr15" 15) ) ) (set (index newval) (c-call VOID "h_ccr_set" index newval)) (get (index) (c-call SI "h_ccr_get" index)) ) ;------------------------------------------------------------------------------ ; Misc (define-hardware (name h-fmax-compare-i-p) (comment "flag") (attrs all-fmax-isas) (type register USI) ) ;****************************************************************************** ; Operands ;------------------------------------------------------------------------------ ; FR Registers (define-full-operand fmax-FRd "FRd" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frd ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRn "FRn" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frn ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRm "FRm" (all-fmax-isas (CDATA FMAX_FLOAT)) h-cr SF f-fmax-frm ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRd-int "FRd as an integer" (all-fmax-isas (CDATA FMAX_INT)) h-cr SI f-fmax-frd ((parse "fmax_cr") (print "fmax_cr")) () ()) (define-full-operand fmax-FRn-int "FRn as an integer" (all-fmax-isas (CDATA FMAX_INT)) h-cr SI f-fmax-frn ((parse "fmax_cr") (print "fmax_cr")) () ()) ;------------------------------------------------------------------------------ ; Control registers (define-full-operand fmax-CCRn "CCRn" (all-fmax-isas (CDATA REGNUM)) h-ccr DFLT f-fmax-4-4 ((parse "fmax_ccr") (print "fmax_ccr")) () ()) (dnop fmax-CIRR "CIRR" (all-fmax-isas SEM-ONLY) h-ccr 0) (dnop fmax-CBCR "CBCR" (all-fmax-isas SEM-ONLY) h-ccr 1) (dnop fmax-CERR "CERR" (all-fmax-isas SEM-ONLY) h-ccr 15) ;------------------------------------------------------------------------------ ; Core General Registers (dnop fmax-Rm "Rm" (all-fmax-isas) h-gpr f-fmax-rm) ;------------------------------------------------------------------------------ ; misc (dnop fmax-Compare-i-p "flag" (all-fmax-isas SEM-ONLY) h-fmax-compare-i-p f-nil) ;****************************************************************************** ; Instructions ;------------------------------------------------------------------------------ ; Binary Arithmetic (define-pmacro (fmax-binary-arith op opc sem) (dni op (.str op " FRd,FRn,FRm") (all-fmax-isas MAY_TRAP) (.str op " ${fmax-FRd},${fmax-FRn},${fmax-FRm}") (+ (f-fmax-0-4 #xF) fmax-FRd (f-fmax-8-4 opc) (f-fmax-12-4 #x7) (f-fmax-16-4 0) fmax-FRn fmax-FRm (f-fmax-31-1 0)) sem () ) ) (fmax-binary-arith fadds #x0 (set fmax-FRd (add fmax-FRn fmax-FRm))) (fmax-binary-arith fsubs #x1 (set fmax-FRd (sub fmax-FRn fmax-FRm))) (fmax-binary-arith fmuls #x2 (set fmax-FRd (mul fmax-FRn fmax-FRm))) (fmax-binary-arith fdivs #x3 (set fmax-FRd (div fmax-FRn fmax-FRm))) ;------------------------------------------------------------------------------ ; Unary Arithmetic (define-pmacro (fmax-unary-arith op opc sem) (dni op (.str op " FRd,FRn") (all-fmax-isas MAY_TRAP) (.str op " ${fmax-FRd},${fmax-FRn}") (+ (f-fmax-0-4 #xF) fmax-FRd (f-fmax-8-4 opc) (f-fmax-12-4 #x7) (f-fmax-16-4 0) fmax-FRn (f-fmax-24-4 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) sem () ) ) (fmax-unary-arith fsqrts #x4 (set fmax-FRd (sqrt fmax-FRn))) (fmax-unary-arith fabss #x5 (set fmax-FRd (abs fmax-FRn))) (fmax-unary-arith fnegs #x7 (set fmax-FRd (neg fmax-FRn))) (fmax-unary-arith fmovs #x6 (set fmax-FRd fmax-FRn)) ;------------------------------------------------------------------------------ ; Conversions (define-pmacro (fmax-conv op opc1 opc2 opnd1 opnd2 sem) (dni op (.str op " FRd,FRn") (all-fmax-isas MAY_TRAP) (.str op " ${" opnd1 "},${" opnd2 "}") (+ (f-fmax-0-4 #xF) opnd1 (f-fmax-8-4 opc1) (f-fmax-12-4 #x7) (f-fmax-16-4 opc2) opnd2 (f-fmax-24-4 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) sem () ) ) (fmax-conv froundws #xC #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_froundws" fmax-FRn))) (fmax-conv ftruncws #xD #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ftruncws" fmax-FRn))) (fmax-conv fceilws #xE #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fceilws" fmax-FRn))) (fmax-conv ffloorws #xF #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ffloorws" fmax-FRn))) (fmax-conv fcvtws #x4 #x1 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fcvtws" fmax-FRn))) (fmax-conv fcvtsw #x0 #x9 fmax-FRd fmax-FRn-int (set fmax-FRd (float SF FPCONV-DEFAULT fmax-FRn-int))) ;------------------------------------------------------------------------------ ; Comparisons ; ; Comparison with no exceptions (define-pmacro (fmax-f-sem x y) (andif (gt x y) (lt x y))) ; do this to get exception detection (define-pmacro (fmax-u-sem x y) (not (orif (lt x y) (orif (eq x y) (gt x y))))) (define-pmacro (fmax-e-sem x y) (eq x y)) (define-pmacro (fmax-ue-sem x y) (not (orif (lt x y) (gt x y)))) (define-pmacro (fmax-l-sem x y) (lt x y)) (define-pmacro (fmax-ul-sem x y) (not (orif (gt x y) (eq x y)))) (define-pmacro (fmax-le-sem x y) (orif (lt x y) (eq x y))) (define-pmacro (fmax-ule-sem x y) (not (gt x y))) (define-pmacro (fmax-comp cond suffix exceptions) (dni (.sym fcmp cond suffix s) (.str "fcmp" cond suffix "s FRn,FRm") ;; Even though the instruction doesn't really trap if EXCEPTIONS ;; is zero, we don't want gcc to put it in a repeat or erepeat ;; block because of the hazards between fcmp instructions and ;; anything that reads CBCR. (all-fmax-isas MAY_TRAP) (.str "fcmp" cond suffix "s ${fmax-FRn},${fmax-FRm}") (+ (f-fmax-0-4 #xF) (f-fmax-4-4 0) (.sym FMAX_ cond suffix) (f-fmax-12-4 #x7) (f-fmax-16-4 #x2) (f-fmax-28-1 0) fmax-FRn fmax-FRm (f-fmax-31-1 0)) (sequence () (set fmax-Compare-i-p exceptions) (set fmax-CBCR ((.sym fmax- cond -sem) fmax-FRn fmax-FRm)) (set fmax-Compare-i-p 0) ) () ) ) ; Comparison with no exceptions (fmax-comp f "" 0) (fmax-comp u "" 0) (fmax-comp e "" 0) (fmax-comp ue "" 0) (fmax-comp l "" 0) (fmax-comp ul "" 0) (fmax-comp le "" 0) (fmax-comp ule "" 0) ; Comparison with exceptions (fmax-comp f i 1) (fmax-comp u i 1) (fmax-comp e i 1) (fmax-comp ue i 1) (fmax-comp l i 1) (fmax-comp ul i 1) (fmax-comp le i 1) (fmax-comp ule i 1) ;------------------------------------------------------------------------------ ; Move to/from core registers (dni cmov-frn-rm "cmov FRn,Rm" (all-fmax-isas (INTRINSIC "cmov1")) "cmov ${fmax-FRd-int},${fmax-Rm}" (+ (f-fmax-0-4 #xF) fmax-FRd-int fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-29-1 0) (f-fmax-30-1 0) (f-fmax-31-1 0)) (set fmax-FRd-int fmax-Rm) () ) (dni cmov-rm-frn "cmov Rm,FRn" (all-fmax-isas (INTRINSIC "cmov2")) "cmov ${fmax-Rm},${fmax-FRd-int}" (+ (f-fmax-0-4 #xF) fmax-FRd-int fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-29-1 0) (f-fmax-30-1 0) (f-fmax-31-1 1)) (set fmax-Rm fmax-FRd-int) () ) (dni cmovc-ccrn-rm "cmovc CCRn,Rm" (all-fmax-isas (INTRINSIC "cmovc1")) "cmovc ${fmax-CCRn},${fmax-Rm}" (+ (f-fmax-0-4 #xF) fmax-CCRn fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-28-1 0) (f-fmax-29-1 0) (f-fmax-30-1 1) (f-fmax-31-1 0)) (set fmax-CCRn fmax-Rm) () ) (dni cmovc-rm-ccrn "cmovc Rm,CCRn" (all-fmax-isas (INTRINSIC "cmovc2")) "cmovc ${fmax-Rm},${fmax-CCRn}" (+ (f-fmax-0-4 #xF) fmax-CCRn fmax-Rm (f-fmax-12-4 #x7) (f-fmax-16-4 #xF) (f-fmax-20-4 0) (f-fmax-24-4 0) (f-fmax-28-1 0) (f-fmax-29-1 0) (f-fmax-30-1 1) (f-fmax-31-1 1)) (set fmax-Rm fmax-CCRn) () ) @