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1.6
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desc
@@


1.6
log
@Make Arm and RISC-V ports share sys/dev/fdt/pcihost_fdt.[ch]

NFCI.
@
text
@# $NetBSD: files.fdt,v 1.5 2025/09/06 21:02:41 thorpej Exp $

include	"dev/pckbport/files.pckbport"

file	dev/fdt/fdt_platform.c
file	arch/riscv/fdt/cpus_fdt.c
file	arch/riscv/fdt/fdt_dma_machdep.c
file	arch/riscv/fdt/riscv_platform.c

attach	cpu at fdt with cpu_fdt
file	arch/riscv/fdt/cpu_fdt.c		cpu_fdt

device	clint: fdt
attach	clint at fdt with clint_fdt
file	arch/riscv/fdt/clint_fdt.c		clint_fdt

device	intc: fdt
attach	intc at fdt with intc_fdt
file	arch/riscv/fdt/intc_fdt.c		intc_fdt
@


1.5
log
@Refactor the "platform" defitions into fdt_platform.h
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.4 2025/01/01 17:53:07 skrll Exp $
a19 5

# Generic PCI host controller
device	pcihost: pcibus
attach	pcihost at fdt with pcihost_fdt
file	arch/riscv/fdt/pcihost_fdt.c		pcihost_fdt
@


1.4
log
@risc-v: add support for PCI and the PCIe controller in the JH7110 SoC.

Testing as working with xhci and nvme on VisionFive2.

Uses legacy PCI interrupts currently. MSIs to be added later.

pcihost_fdt code is 99% the same as the Arm version and should be shared.
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.3 2023/06/12 18:59:57 skrll Exp $
d5 1
@


1.4.2.1
log
@Pull up following revision(s) (requested by rin in ticket #31):

	sys/arch/arm/fdt/files.fdt: revision 1.37
	sys/arch/riscv/fdt/files.fdt: revision 1.5
	sys/dev/fdt/files.fdt: revision 1.75 via patch

Prune fdt_platform.c from sys/dev/fdt/files.fdt and explicitly pull
in at sys/arch/arm/fdt/files.fdt and sys/arch/riscv/fdt/files.fdt.
Unbreaks OCTEON build.
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.4 2025/01/01 17:53:07 skrll Exp $
a4 1
file	dev/fdt/fdt_platform.c
@


1.3
log
@sort
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.2 2023/06/12 12:58:17 skrll Exp $
d19 5
@


1.3.6.1
log
@Sync with HEAD
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.4 2025/01/01 17:53:07 skrll Exp $
a18 5

# Generic PCI host controller
device	pcihost: pcibus
attach	pcihost at fdt with pcihost_fdt
file	arch/riscv/fdt/pcihost_fdt.c		pcihost_fdt
@


1.3.6.2
log
@Sync with HEAD
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.3.6.1 2025/08/02 05:56:02 perseant Exp $
a4 1
file	dev/fdt/fdt_platform.c
d19 5
@


1.2
log
@Call / define fdtbus_cpus_md_attach for platforms with cpus @@ fdt.

The RISC-V binding here seems somewhat of an abuse, but it exists in
mainline linux.
@
text
@d1 1
a1 1
# $NetBSD: files.fdt,v 1.1 2023/05/07 12:41:48 skrll Exp $
a4 2
file	arch/riscv/fdt/riscv_platform.c

d7 1
@


1.1
log
@RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).
@
text
@d1 1
a1 1
# $NetBSD$
d7 1
a8 1
file	arch/riscv/fdt/fdt_cpus_machdep.c
@