head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC7:1.1.1.1 netbsd-11-0-RC6:1.1.1.1 netbsd-11-0-RC5:1.1.1.1 netbsd-11-0-RC4:1.1.1.1 netbsd-11-0-RC3:1.1.1.1 netbsd-11-0-RC2:1.1.1.1 netbsd-11-0-RC1:1.1.1.1 netbsd-11:1.1.1.1.0.6 netbsd-11-base:1.1.1.1 netbsd-10-1-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.1 netbsd-10-0-RELEASE:1.1.1.1 netbsd-10-0-RC6:1.1.1.1 netbsd-10-0-RC5:1.1.1.1 netbsd-10-0-RC4:1.1.1.1 netbsd-10-0-RC3:1.1.1.1 netbsd-10-0-RC2:1.1.1.1 netbsd-10-0-RC1:1.1.1.1 netbsd-10:1.1.1.1.0.4 netbsd-10-base:1.1.1.1 netbsd-9-3-RELEASE:1.1.1.1 netbsd-9-2-RELEASE:1.1.1.1 netbsd-9-1-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.1 netbsd-9-0-RC2:1.1.1.1 netbsd-9-0-RC1:1.1.1.1 netbsd-9:1.1.1.1.0.2 netbsd-9-base:1.1.1.1 src-current-2019-03-18:1.1.1.1 NetBSD:1.1.1; locks; strict; comment @# @; 1.1 date 2019.05.10.06.22.24; author mrg; state Exp; branches 1.1.1.1; next ; commitid NVvVabT92hhUGCmB; 1.1.1.1 date 2019.05.10.06.22.24; author mrg; state Exp; branches; next ; commitid NVvVabT92hhUGCmB; desc @@ 1.1 log @Initial revision @ text @/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; and.nz (1) null g2.0<1,1,1>UD 0x1UD{align1}; (f0) jmpi direct_idct; add (1) g2.8<1>UD g115.8<1,1,1>UD 0UD{align1}; send (16) 0 g3.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g4.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g5.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g6.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g7.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g8.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g9.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g10.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g11.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g12.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g13.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g14.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g15.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g16.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g17.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g18.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g19.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g20.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g21.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g22.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g23<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g24.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g25.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g26.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; direct_idct: mov (1) g1.8<1>UD 0x00F000FUD {align1}; mov.sat (16) g3.0<2>UB g3.0<16,16,1>W {align1}; mov.sat (16) g4.0<2>UB g4.0<16,16,1>W {align1}; mov.sat (16) g5.0<2>UB g5.0<16,16,1>W {align1}; mov.sat (16) g6.0<2>UB g6.0<16,16,1>W {align1}; mov.sat (16) g7.0<2>UB g7.0<16,16,1>W {align1}; mov.sat (16) g8.0<2>UB g8.0<16,16,1>W {align1}; mov.sat (16) g9.0<2>UB g9.0<16,16,1>W {align1}; mov.sat (16) g10.0<2>UB g10.0<16,16,1>W {align1}; mov.sat (16) g11.0<2>UB g11.0<16,16,1>W {align1}; mov.sat (16) g12.0<2>UB g12.0<16,16,1>W {align1}; mov.sat (16) g13.0<2>UB g13.0<16,16,1>W {align1}; mov.sat (16) g14.0<2>UB g14.0<16,16,1>W {align1}; mov.sat (16) g15.0<2>UB g15.0<16,16,1>W {align1}; mov.sat (16) g16.0<2>UB g16.0<16,16,1>W {align1}; mov.sat (16) g17.0<2>UB g17.0<16,16,1>W {align1}; mov.sat (16) g18.0<2>UB g18.0<16,16,1>W {align1}; and.nz (1) null g1.30<1,1,1>UB 0x1UW{align1}; (f0) jmpi field_dct; //Frame IDCT mov (16) m1.0<1>UB g3.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g4.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g5.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g6.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g7.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g8.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g9.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g10.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g11.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g12.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g13.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g14.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g15.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g16.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g17.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g18.0<16,16,2>UB {align1}; jmpi write_back; field_dct: //Field IDCT mov (16) m1.0<1>UB g3.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g11.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g4.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g12.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g5.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g13.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g6.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g14.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g7.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g15.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g8.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g16.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g9.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g17.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g10.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g18.0<16,16,2>UB {align1}; write_back: send (16) 0 acc0<1>UW g1<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g1.8<1>UD 0x0070007UD { align1 }; shr (2) g1.0<1>UD g115.0<2,2,1>UD 1D {align1}; mov.sat (16) g19.0<2>UB g19.0<16,16,1>W {align1}; mov.sat (16) g20.0<2>UB g20.0<16,16,1>W {align1}; mov.sat (16) g21.0<2>UB g21.0<16,16,1>W {align1}; mov.sat (16) g22.0<2>UB g22.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g19.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g20.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g21.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g22.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V mov.sat (16) g23.0<2>UB g23.0<16,16,1>W {align1}; mov.sat (16) g24.0<2>UB g24.0<16,16,1>W {align1}; mov.sat (16) g25.0<2>UB g25.0<16,16,1>W {align1}; mov.sat (16) g26.0<2>UB g26.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g23.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g24.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g25.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g26.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; @ 1.1.1.1 log @import our slightly older intel xf86 driver as "intel-2014". this driver works better on older systems, but doesn't support gen9 as well. @ text @@