head	1.1;
branch	1.1.1;
access;
symbols
	netbsd-11-0-RC5:1.1.1.2
	netbsd-11-0-RC4:1.1.1.2
	netbsd-11-0-RC3:1.1.1.2
	netbsd-11-0-RC2:1.1.1.2
	netbsd-11-0-RC1:1.1.1.2
	perseant-exfatfs-base-20250801:1.1.1.2
	netbsd-11:1.1.1.2.0.18
	netbsd-11-base:1.1.1.2
	netbsd-10-1-RELEASE:1.1.1.2
	perseant-exfatfs-base-20240630:1.1.1.2
	perseant-exfatfs:1.1.1.2.0.16
	perseant-exfatfs-base:1.1.1.2
	netbsd-8-3-RELEASE:1.1.1.1
	netbsd-9-4-RELEASE:1.1.1.2
	netbsd-10-0-RELEASE:1.1.1.2
	netbsd-10-0-RC6:1.1.1.2
	netbsd-10-0-RC5:1.1.1.2
	netbsd-10-0-RC4:1.1.1.2
	netbsd-10-0-RC3:1.1.1.2
	netbsd-10-0-RC2:1.1.1.2
	netbsd-10-0-RC1:1.1.1.2
	netbsd-10:1.1.1.2.0.14
	netbsd-10-base:1.1.1.2
	netbsd-9-3-RELEASE:1.1.1.2
	gmp-6-2-1:1.1.1.2
	cjep_sun2x-base1:1.1.1.2
	cjep_sun2x:1.1.1.2.0.12
	cjep_sun2x-base:1.1.1.2
	cjep_staticlib_x-base1:1.1.1.2
	netbsd-9-2-RELEASE:1.1.1.2
	cjep_staticlib_x:1.1.1.2.0.10
	cjep_staticlib_x-base:1.1.1.2
	netbsd-9-1-RELEASE:1.1.1.2
	gmp-6-2-0:1.1.1.2
	phil-wifi-20200421:1.1.1.2
	phil-wifi-20200411:1.1.1.2
	is-mlppp:1.1.1.2.0.8
	is-mlppp-base:1.1.1.2
	phil-wifi-20200406:1.1.1.2
	netbsd-8-2-RELEASE:1.1.1.1
	netbsd-9-0-RELEASE:1.1.1.2
	netbsd-9-0-RC2:1.1.1.2
	netbsd-9-0-RC1:1.1.1.2
	phil-wifi-20191119:1.1.1.2
	netbsd-9:1.1.1.2.0.6
	netbsd-9-base:1.1.1.2
	phil-wifi-20190609:1.1.1.2
	netbsd-8-1-RELEASE:1.1.1.1
	netbsd-8-1-RC1:1.1.1.1
	pgoyette-compat-merge-20190127:1.1.1.2
	pgoyette-compat-20190127:1.1.1.2
	pgoyette-compat-20190118:1.1.1.2
	pgoyette-compat-1226:1.1.1.2
	pgoyette-compat-1126:1.1.1.2
	pgoyette-compat-1020:1.1.1.2
	pgoyette-compat-0930:1.1.1.2
	pgoyette-compat-0906:1.1.1.2
	netbsd-7-2-RELEASE:1.1.1.1
	pgoyette-compat-0728:1.1.1.2
	netbsd-8-0-RELEASE:1.1.1.1
	phil-wifi:1.1.1.2.0.4
	phil-wifi-base:1.1.1.2
	pgoyette-compat-0625:1.1.1.2
	netbsd-8-0-RC2:1.1.1.1
	pgoyette-compat-0521:1.1.1.2
	pgoyette-compat-0502:1.1.1.2
	pgoyette-compat-0422:1.1.1.2
	netbsd-8-0-RC1:1.1.1.1
	pgoyette-compat-0415:1.1.1.2
	pgoyette-compat-0407:1.1.1.2
	pgoyette-compat-0330:1.1.1.2
	pgoyette-compat-0322:1.1.1.2
	pgoyette-compat-0315:1.1.1.2
	netbsd-7-1-2-RELEASE:1.1.1.1
	pgoyette-compat:1.1.1.2.0.2
	pgoyette-compat-base:1.1.1.2
	netbsd-7-1-1-RELEASE:1.1.1.1
	matt-nb8-mediatek:1.1.1.1.0.38
	matt-nb8-mediatek-base:1.1.1.1
	gmp-6-1-2:1.1.1.2
	perseant-stdc-iso10646:1.1.1.1.0.36
	perseant-stdc-iso10646-base:1.1.1.1
	netbsd-8:1.1.1.1.0.34
	netbsd-8-base:1.1.1.1
	prg-localcount2-base3:1.1.1.1
	prg-localcount2-base2:1.1.1.1
	prg-localcount2-base1:1.1.1.1
	prg-localcount2:1.1.1.1.0.32
	prg-localcount2-base:1.1.1.1
	pgoyette-localcount-20170426:1.1.1.1
	bouyer-socketcan-base1:1.1.1.1
	pgoyette-localcount-20170320:1.1.1.1
	netbsd-7-1:1.1.1.1.0.30
	netbsd-7-1-RELEASE:1.1.1.1
	netbsd-7-1-RC2:1.1.1.1
	netbsd-7-nhusb-base-20170116:1.1.1.1
	bouyer-socketcan:1.1.1.1.0.28
	bouyer-socketcan-base:1.1.1.1
	pgoyette-localcount-20170107:1.1.1.1
	netbsd-7-1-RC1:1.1.1.1
	pgoyette-localcount-20161104:1.1.1.1
	netbsd-7-0-2-RELEASE:1.1.1.1
	localcount-20160914:1.1.1.1
	netbsd-7-nhusb:1.1.1.1.0.26
	netbsd-7-nhusb-base:1.1.1.1
	pgoyette-localcount-20160806:1.1.1.1
	pgoyette-localcount-20160726:1.1.1.1
	pgoyette-localcount:1.1.1.1.0.24
	pgoyette-localcount-base:1.1.1.1
	netbsd-7-0-1-RELEASE:1.1.1.1
	netbsd-7-0:1.1.1.1.0.22
	netbsd-7-0-RELEASE:1.1.1.1
	netbsd-7-0-RC3:1.1.1.1
	netbsd-7-0-RC2:1.1.1.1
	netbsd-7-0-RC1:1.1.1.1
	netbsd-6-0-6-RELEASE:1.1.1.1
	netbsd-6-1-5-RELEASE:1.1.1.1
	netbsd-7:1.1.1.1.0.20
	netbsd-7-base:1.1.1.1
	yamt-pagecache-base9:1.1.1.1
	yamt-pagecache-tag8:1.1.1.1
	netbsd-6-1-4-RELEASE:1.1.1.1
	netbsd-6-0-5-RELEASE:1.1.1.1
	tls-earlyentropy:1.1.1.1.0.18
	tls-earlyentropy-base:1.1.1.1
	riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1
	riastradh-drm2-base3:1.1.1.1
	netbsd-6-1-3-RELEASE:1.1.1.1
	netbsd-6-0-4-RELEASE:1.1.1.1
	gmp-5-1-3:1.1.1.1
	netbsd-6-1-2-RELEASE:1.1.1.1
	netbsd-6-0-3-RELEASE:1.1.1.1
	netbsd-6-1-1-RELEASE:1.1.1.1
	riastradh-drm2-base2:1.1.1.1
	riastradh-drm2-base1:1.1.1.1
	riastradh-drm2:1.1.1.1.0.12
	riastradh-drm2-base:1.1.1.1
	netbsd-6-1:1.1.1.1.0.16
	netbsd-6-0-2-RELEASE:1.1.1.1
	netbsd-6-1-RELEASE:1.1.1.1
	netbsd-6-1-RC4:1.1.1.1
	netbsd-6-1-RC3:1.1.1.1
	agc-symver:1.1.1.1.0.14
	agc-symver-base:1.1.1.1
	netbsd-6-1-RC2:1.1.1.1
	netbsd-6-1-RC1:1.1.1.1
	yamt-pagecache-base8:1.1.1.1
	netbsd-6-0-1-RELEASE:1.1.1.1
	yamt-pagecache-base7:1.1.1.1
	matt-nb6-plus-nbase:1.1.1.1
	yamt-pagecache-base6:1.1.1.1
	netbsd-6-0:1.1.1.1.0.10
	netbsd-6-0-RELEASE:1.1.1.1
	netbsd-6-0-RC2:1.1.1.1
	tls-maxphys:1.1.1.1.0.8
	tls-maxphys-base:1.1.1.1
	matt-nb6-plus:1.1.1.1.0.6
	matt-nb6-plus-base:1.1.1.1
	netbsd-6-0-RC1:1.1.1.1
	yamt-pagecache-base5:1.1.1.1
	yamt-pagecache-base4:1.1.1.1
	netbsd-6:1.1.1.1.0.4
	netbsd-6-base:1.1.1.1
	yamt-pagecache-base3:1.1.1.1
	yamt-pagecache-base2:1.1.1.1
	yamt-pagecache:1.1.1.1.0.2
	yamt-pagecache-base:1.1.1.1
	gmp-5-0-2:1.1.1.1
	gmp:1.1.1;
locks; strict;
comment	@;; @;


1.1
date	2011.06.20.05.54.40;	author mrg;	state Exp;
branches
	1.1.1.1;
next	;

1.1.1.1
date	2011.06.20.05.54.40;	author mrg;	state Exp;
branches;
next	1.1.1.2;

1.1.1.2
date	2017.08.22.09.40.49;	author mrg;	state Exp;
branches;
next	;
commitid	W5kmAIk8hwVpSb4A;


desc
@@


1.1
log
@Initial revision
@
text
@dnl  PowerPC-32/VMX and PowerPC-64/VMX mpn_and_n, mpn_andn_n, mpn_nand_n,
dnl  mpn_ior_n, mpn_iorn_n, mpn_nior_n, mpn_xor_n, mpn_xnor_n -- mpn bitwise
dnl  logical operations.

dnl  Copyright 2006 Free Software Foundation, Inc.

dnl  This file is part of the GNU MP Library.

dnl  The GNU MP Library is free software; you can redistribute it and/or modify
dnl  it under the terms of the GNU Lesser General Public License as published
dnl  by the Free Software Foundation; either version 3 of the License, or (at
dnl  your option) any later version.

dnl  The GNU MP Library is distributed in the hope that it will be useful, but
dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
dnl  License for more details.

dnl  You should have received a copy of the GNU Lesser General Public License
dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.

include(`../config.m4')


C               and,ior,andn,nior,xor    iorn,xnor         nand
C                   cycles/limb         cycles/limb    cycles/limb
C 7400,7410 (G4):       1.39                 ?              ?
C 744x,745x (G4+):      1.14                1.39           1.39
C 970:                  1.7                 2.0            2.0

C STATUS
C  * Works for all sizes and alignment for 32-bit limbs.
C  * Works for n >= 4 for 64-bit limbs; untested for smaller operands.
C  * Current performance makes this pointless for 970

C TODO
C  * Might want to make variants when just one of the source operands needs
C    vperm, and when neither needs it.  The latter runs 50% faster on 7400.
C  * Idea: If the source operands are equally aligned, we could do the logops
C    first, then vperm before storing!  That means we never need more than one
C    vperm, ever!
C  * Perhaps align `rp' after initial alignment loop?
C  * Instead of having scalar code in the beginning and end, consider using
C    read-modify-write vector code.
C  * Software pipeline?  Hopefully not too important, this is hairy enough
C    already.
C  * At least be more clever about operand loading, i.e., load v operands before
C    u operands, since v operands are sometimes negated.

define(`GMP_LIMB_BYTES', eval(GMP_LIMB_BITS/8))
define(`LIMBS_PER_VR',  eval(16/GMP_LIMB_BYTES))
define(`LIMBS_PER_2VR', eval(32/GMP_LIMB_BYTES))

define(`vnegb', `')		C default neg-before to null
define(`vnega', `')		C default neg-before to null

ifdef(`OPERATION_and_n',
`	define(`func',	`mpn_and_n')
	define(`logopS',`and	$1,$2,$3')
	define(`logop',	`vand	$1,$2,$3')')
ifdef(`OPERATION_andn_n',
`	define(`func',	`mpn_andn_n')
	define(`logopS',`andc	$1,$2,$3')
	define(`logop',	`vandc	$1,$2,$3')')
ifdef(`OPERATION_nand_n',
`	define(`func',	`mpn_nand_n')
	define(`logopS',`nand	$1,$2,$3')
	define(`logop',	`vand	$1,$2,$3')
	define(`vnega',	`vnor	$1,$2,$2')')
ifdef(`OPERATION_ior_n',
`	define(`func',	`mpn_ior_n')
	define(`logopS',`or	$1,$2,$3')
	define(`logop',	`vor	$1,$2,$3')')
ifdef(`OPERATION_iorn_n',
`	define(`func',	`mpn_iorn_n')
	define(`logopS',`orc	$1,$2,$3')
	define(`vnegb',	`vnor	$1,$2,$2')
	define(`logop',	`vor	$1,$2,$3')')
ifdef(`OPERATION_nior_n',
`	define(`func',	`mpn_nior_n')
	define(`logopS',`nor	$1,$2,$3')
	define(`logop',	`vnor	$1,$2,$3')')
ifdef(`OPERATION_xor_n',
`	define(`func',	`mpn_xor_n')
	define(`logopS',`xor	$1,$2,$3')
	define(`logop',	`vxor	$1,$2,$3')')
ifdef(`OPERATION_xnor_n',
`	define(`func',`mpn_xnor_n')
	define(`logopS',`eqv	$1,$2,$3')
	define(`vnegb',	`vnor	$1,$2,$2')
	define(`logop',	`vxor	$1,$2,$3')')

ifelse(GMP_LIMB_BITS,`32',`
	define(`LIMB32',`	$1')
	define(`LIMB64',`')
',`
	define(`LIMB32',`')
	define(`LIMB64',`	$1')
')

C INPUT PARAMETERS
define(`rp',	`r3')
define(`up',	`r4')
define(`vp',	`r5')
define(`n',	`r6')

define(`us',	`v8')
define(`vs',	`v9')

MULFUNC_PROLOGUE(mpn_and_n mpn_andn_n mpn_nand_n mpn_ior_n mpn_iorn_n mpn_nior_n mpn_xor_n mpn_xnor_n)

ASM_START()
PROLOGUE(func)

LIMB32(`cmpwi	cr0, n, 8	')
LIMB64(`cmpdi	cr0, n, 4	')
	bge	L(big)

	mtctr	n

LIMB32(`lwz	r8, 0(up)	')
LIMB32(`lwz	r9, 0(vp)	')
LIMB32(`logopS(	r0, r8, r9)	')
LIMB32(`stw	r0, 0(rp)	')
LIMB32(`bdz	L(endS)		')

L(topS):
LIMB32(`lwzu	r8, 4(up)	')
LIMB64(`ld	r8, 0(up)	')
LIMB64(`addi	up, up, GMP_LIMB_BYTES	')
LIMB32(`lwzu	r9, 4(vp)	')
LIMB64(`ld	r9, 0(vp)	')
LIMB64(`addi	vp, vp, GMP_LIMB_BYTES	')
	logopS(	r0, r8, r9)
LIMB32(`stwu	r0, 4(rp)	')
LIMB64(`std	r0, 0(rp)	')
LIMB64(`addi	rp, rp, GMP_LIMB_BYTES	')
	bdnz	L(topS)
L(endS):
	blr

L(big):	mfspr	r12, 256
	oris	r0, r12, 0xfffc		C Set VRSAVE bit 0-13 FIXME
	mtspr	256, r0

C First loop until the destination is 16-byte aligned.  This will execute 0 or 1
C times for 64-bit machines, and 0 to 3 times for 32-bit machines.

LIMB32(`rlwinm.	r0, rp, 30,30,31')	C (rp >> 2) mod 4
LIMB64(`rlwinm.	r0, rp, 29,31,31')	C (rp >> 3) mod 2
	beq	L(aligned)

	subfic	r7, r0, LIMBS_PER_VR
LIMB32(`li	r10, 0		')
	subf	n, r7, n
L(top0):
LIMB32(`lwz	r8, 0(up)	')
LIMB64(`ld	r8, 0(up)	')
	addi	up, up, GMP_LIMB_BYTES
LIMB32(`lwz	r9, 0(vp)	')
LIMB64(`ld	r9, 0(vp)	')
	addi	vp, vp, GMP_LIMB_BYTES
LIMB32(`addic.	r7, r7, -1	')
	logopS(	r0, r8, r9)
LIMB32(`stwx	r0, r10, rp	')
LIMB64(`std	r0, 0(rp)	')
LIMB32(`addi	r10, r10, GMP_LIMB_BYTES')
LIMB32(`bne	L(top0)		')

	addi	rp, rp, 16		C update rp, but preserve its alignment

L(aligned):
LIMB64(`srdi	r7, n, 1	')	C loop count corresponding to n
LIMB32(`srwi	r7, n, 2	')	C loop count corresponding to n
	mtctr	r7			C copy n to count register

	li	r10, 16
	lvsl	us, 0, up
	lvsl	vs, 0, vp

	lvx	v2, 0, up
	lvx	v3, 0, vp
	bdnz	L(gt1)
	lvx	v0, r10, up
	lvx	v1, r10, vp
	vperm	v4, v2, v0, us
	vperm	v5, v3, v1, vs
	vnegb(	v5, v5)
	logop(	v6, v4, v5)
	vnega(	v6, v6)
	stvx	v6, 0, rp
	addi	up, up, 16
	addi	vp, vp, 16
	addi	rp, rp, 4
	b	L(tail)

L(gt1):	addi	up, up, 16
	addi	vp, vp, 16

L(top):	lvx	v0, 0, up
	lvx	v1, 0, vp
	vperm	v4, v2, v0, us
	vperm	v5, v3, v1, vs
	vnegb(	v5, v5)
	logop(	v6, v4, v5)
	vnega(	v6, v6)
	stvx	v6, 0, rp
	bdz	L(end)
	lvx	v2, r10, up
	lvx	v3, r10, vp
	vperm	v4, v0, v2, us
	vperm	v5, v1, v3, vs
	vnegb(	v5, v5)
	logop(	v6, v4, v5)
	vnega(	v6, v6)
	stvx	v6, r10, rp
	addi	up, up, 32
	addi	vp, vp, 32
	addi	rp, rp, 32
	bdnz	L(top)

	andi.	r0, up, 15
	vxor	v0, v0, v0
	beq	1f
	lvx	v0, 0, up
1:	andi.	r0, vp, 15
	vxor	v1, v1, v1
	beq	1f
	lvx	v1, 0, vp
1:	vperm	v4, v2, v0, us
	vperm	v5, v3, v1, vs
	vnegb(	v5, v5)
	logop(	v6, v4, v5)
	vnega(	v6, v6)
	stvx	v6, 0, rp
	addi	rp, rp, 4
	b	L(tail)

L(end):	andi.	r0, up, 15
	vxor	v2, v2, v2
	beq	1f
	lvx	v2, r10, up
1:	andi.	r0, vp, 15
	vxor	v3, v3, v3
	beq	1f
	lvx	v3, r10, vp
1:	vperm	v4, v0, v2, us
	vperm	v5, v1, v3, vs
	vnegb(	v5, v5)
	logop(	v6, v4, v5)
	vnega(	v6, v6)
	stvx	v6, r10, rp

	addi	up, up, 16
	addi	vp, vp, 16
	addi	rp, rp, 20

L(tail):
LIMB32(`rlwinm.	r7, n, 0,30,31	')	C r7 = n mod 4
LIMB64(`rlwinm.	r7, n, 0,31,31	')	C r7 = n mod 2
	beq	L(ret)
	addi	rp, rp, 15
LIMB32(`rlwinm	rp, rp, 0,0,27	')
LIMB64(`rldicr	rp, rp, 0,59	')
	li	r10, 0
L(top2):
LIMB32(`lwzx	r8, r10, up	')
LIMB64(`ldx	r8, r10, up	')
LIMB32(`lwzx	r9, r10, vp	')
LIMB64(`ldx	r9, r10, vp	')
LIMB32(`addic.	r7, r7, -1	')
	logopS(	r0, r8, r9)
LIMB32(`stwx	r0, r10, rp	')
LIMB64(`std	r0, 0(rp)	')
LIMB32(`addi	r10, r10, GMP_LIMB_BYTES')
LIMB32(`bne	L(top2)		')

L(ret):	mtspr	256, r12
	blr
EPILOGUE()

C This works for 64-bit PowerPC, since a limb ptr can only be aligned
C in 2 relevant ways, which means we can always find a pair of aligned
C pointers of rp, up, and vp.
C process words until rp is 16-byte aligned
C if (((up | vp) & 15) == 0)
C   process with VMX without any vperm
C else if ((up & 15) != 0 && (vp & 15) != 0)
C   process with VMX using vperm on store data
C else if ((up & 15) != 0)
C   process with VMX using vperm on up data
C else
C   process with VMX using vperm on vp data
C
C	rlwinm,	r0, up, 0,28,31
C	rlwinm	r0, vp, 0,28,31
C	cmpwi	cr7, r0, 0
C	cror	cr6, cr0, cr7
C	crand	cr0, cr0, cr7
@


1.1.1.1
log
@initial import of GMP 5.0.2.

GNU MP is a library for arbitrary precision arithmetic, operating on signed
integers, rational numbers, and floating point numbers.  It has a rich set
of functions, and the functions have a regular interface.

GMP is necessary for GCC >= 4.2.
@
text
@@


1.1.1.2
log
@initial import of GMP 6.1.2.  main changes from 5.1.3 below.

notes:
 - support for thumb-less ARM chips was in our port of 5.1.3, but a
   similar method has been provided upstream now
 - someone should look at the AVX failure reports, and fix them

Changes between GMP version 6.1.0 and 6.1.1

  FEATURES
  * Work around faulty cpuid on some recent Intel chips (this allows GMP to run
    on Skylake Pentiums).
  * Support thumb-less ARM chips.

Changes between GMP version 6.0.* and 6.1.0

  BUGS FIXED
  * The public function mpn_com is now correctly declared in gmp.h.
  * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for
    some obsolete CPUs.
  * Various problems related to precision for mpf have been fixed.
  * Fixed ABI incompatible stack alignment in calls from assembly code.
  * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI.
  SPEEDUPS
  * Speedup for Intel Broadwell and Skylake through assembly code making use of
    new ADX instructions.
  * Square root is now faster when the remainder is not needed. Also the speed
    to compute the k-th root improved, for small sizes.
  FEATURES
  * New C++ functions gcd and lcm for mpz_class.
  * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap.
  * New public mpq_cmp_z function, to efficiently compare rationals with
    integers.
  * Support for more 32-bit arm processors.
  * Support for AVX-less modern x86 CPUs. (Such support might be missing either
    because the CPU vendor chose to disable AVX, or because the running kernel
    lacks AVX context switch support.)
  * Support for NetBSD under Xen; we switch off AVX unconditionally under
    NetBSD since a bug in NetBSD makes AVX fail under Xen.
  MISC
  * Tuned values for FFT multiplications are provided for larger number on
    many platforms.

Changes between GMP version 5.1.* and 6.0.0
  BUGS FIXED
  * The function mpz_invert now considers any number invertible in Z/1Z.
  * The mpn multiply code now handles operands of more than 2^31 limbs
    correctly.  (Note however that the mpz code is limited to 2^32 bits on
    32-bit hosts and 2^37 bits on 64-bit hosts.)
  SPEEDUPS
  * Plain division of large operands is faster and more monotonous in operand
    size.
  * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved
    assembly.
  * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten
    and vastly expanded assembly support.  Speedup also for the older Core 2
    and Nehalem.
  * Faster mixed arithmetic between mpq_class and double.
  FEATURES
  * Support for new Intel and AMD CPUs.
  * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel
    silent multiplication and squaring.
  * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing
    side-channel silent division.
  * New public functions mpn_cnd_add_n and mpn_cnd_sub_n.  Side-channel silent
    conditional addition and subtraction.
  * New public function mpn_sec_powm, implementing side-channel silent modexp.
  * New public function mpn_sec_invert, implementing side-channel silent
    modular inversion.
  * Better support for applications which use the mpz_t type, but nevertheless
    need to call some of the lower-level mpn functions.  See the documentation
    for mpz_limbs_read and related functions.
@
text
@d8 1
a8 1
dnl
d10 4
a13 14
dnl  it under the terms of either:
dnl
dnl    * the GNU Lesser General Public License as published by the Free
dnl      Software Foundation; either version 3 of the License, or (at your
dnl      option) any later version.
dnl
dnl  or
dnl
dnl    * the GNU General Public License as published by the Free Software
dnl      Foundation; either version 2 of the License, or (at your option) any
dnl      later version.
dnl
dnl  or both in parallel, as here.
dnl
d16 5
a20 6
dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
dnl  for more details.
dnl
dnl  You should have received copies of the GNU General Public License and the
dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
dnl  see https://www.gnu.org/licenses/.
@