head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC5:1.1.1.1 netbsd-11-0-RC4:1.1.1.1 netbsd-11-0-RC3:1.1.1.1 netbsd-11-0-RC2:1.1.1.1 netbsd-11-0-RC1:1.1.1.1 netbsd-11:1.1.1.1.0.8 netbsd-11-base:1.1.1.1 netbsd-10-1-RELEASE:1.1.1.1 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.1 netbsd-10-0-RELEASE:1.1.1.1 netbsd-10-0-RC6:1.1.1.1 netbsd-10-0-RC5:1.1.1.1 netbsd-10-0-RC4:1.1.1.1 netbsd-10-0-RC3:1.1.1.1 netbsd-10-0-RC2:1.1.1.1 netbsd-10-0-RC1:1.1.1.1 netbsd-10:1.1.1.1.0.6 netbsd-10-base:1.1.1.1 netbsd-9-3-RELEASE:1.1.1.1 netbsd-9-2-RELEASE:1.1.1.1 netbsd-9-1-RELEASE:1.1.1.1 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.1 netbsd-9-0-RC2:1.1.1.1 netbsd-9-0-RC1:1.1.1.1 netbsd-9:1.1.1.1.0.4 netbsd-9-base:1.1.1.1 netbsd-8-1-RELEASE:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 netbsd-8-0-RELEASE:1.1.1.1 netbsd-8-0-RC2:1.1.1.1 netbsd-8-0-RC1:1.1.1.1 netbsd-8:1.1.1.1.0.2 netbsd-8-base:1.1.1.1 xf86-video-intel-2-9-1:1.1.1.1 intel:1.1.1; locks; strict; comment @# @; 1.1 date 2015.05.18.22.11.11; author rjs; state Exp; branches 1.1.1.1; next ; commitid rXOAfiH70bJXDYly; 1.1.1.1 date 2015.05.18.22.11.11; author rjs; state Exp; branches; next ; commitid rXOAfiH70bJXDYly; desc @@ 1.1 log @Initial revision @ text @/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') /* * Prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), * * Note that the SIMD16 write message takes data for the first * two sub-spans followed by the data for the second two sub-spans * instead of having the two sub-spans interleaved by channel. Weird. */ mov (8) data_port_r_01<1>F src_sample_r_01<8,8,1>F { align1 }; mov (8) data_port_g_01<1>F src_sample_g_01<8,8,1>F { align1 }; mov (8) data_port_b_01<1>F src_sample_b_01<8,8,1>F { align1 }; mov (8) data_port_a_01<1>F src_sample_a_01<8,8,1>F { align1 }; mov (8) data_port_r_23<1>F src_sample_r_23<8,8,1>F { sechalf align1 }; mov (8) data_port_g_23<1>F src_sample_g_23<8,8,1>F { sechalf align1 }; mov (8) data_port_b_23<1>F src_sample_b_23<8,8,1>F { sechalf align1 }; mov (8) data_port_a_23<1>F src_sample_a_23<8,8,1>F { sechalf align1 }; /* m0, m1 are all direct passed by PS thread payload */ mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { mask_disable align1 }; /* write */ send (16) data_port_msg_0_ind acc0<1>UW g0<8,8,1>UW write ( 0, /* binding_table */ 8, /* pixel scordboard clear, msg type simd16 single source */ 4, /* render target write */ 0 /* no write commit message */ ) mlen 10 rlen 0 { align1 EOT }; nop; nop; nop; nop; nop; nop; nop; nop; @ 1.1.1.1 log @Initial import of xf86-video-intel 2.9.1. This is the final version of the driver with UMS support. @ text @@